Help：Behavioral synthesis problem

[sevid]

Hi,everybody,

when i use behavioral synthesis command "bc_check_design" on my behavioral code,ERROR：
Information:Checking for reset loop coding style will be performed on the reset loop.
Error:There must be a main(infinite) loop inside the reset loop,if you are using the direct reset connection.
Warning:Multiple clock statements appear in the reset loop.

and i cann't go on with my synthesis,i don't know how to correct it,pls help me.

sevid

 

[Shurik]

Hello!!!
I think the error in the following:
Ex:
always @(posedge Reset or posedge C1 or posedge C2)
if (Reset)
Q=4'h0;
else
Q=Q+1;
it is not right !!!!
The synthesizer not understand where is a clock!
Number of conditions must be equally number of variables in sensitivity list or more!

Best regards.

 

[sevid]

In an example of behavioral code,a line lists as follows:
`define ck begin @(posedge clk);
if(reset) disable reset_loop; end
And i should declare it like this,for only use it in this way,i can go on my behavioral synthesis.
I konw it is a predefinition,pls tell me where i can use it ? because i cann't understand the way the example uses.

I will appreciate ur help.
sevid