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HDL Softwares Modelsim, ISE.....

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electronicengr

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Hi folks
I am new to Verilog, can anybody please explain what is Modelsim and ISE, and what is the difference between them, any material will be highly appreciated.
 

kalyanasv

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Well you question is very general.

For FPGA's
If I consider Xilinx (Integrated software environment)ISE enables you to write code and simulate and synthesize all in one environment.
Modelsim is a tool used for verification and simulation of your design in verilog.

You can download Xilinx ISE Xilinx and use the free web license to get started.

There is also Altera Quartus, Actel Libero

ASIC:

You have analogous environments which can comprise of Synopsys tools +Cadence
 

TrickyDicky

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Basically:

Modelsim is a simulator
ISE will compile your code for a real chip. I think it also comes with a simulator now.
 

electronicengr

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I got it, Modelsim is only for functional simulation while Xilinx ISE is for logic synthesis, right? so should i begin with modelsim?
 

dtn_me

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Good idea is always to start with simulations. Once you are sure that there are no compilation errors, and your design is performing as expected, then move on to synthesis.
Industry follows the similar flow : Design --> Simulation --> Synthesis --> Backend flow

Modelsim is from Mentor. Latest Modelsim version is Questa Sim which can be used to simulate System Verilog codes.
Xilinx ISE is targeted for FPGA realization. Move on to synthesis only if you are 100% sure that your design is functionally correct.

DTN
 

blooz

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Here is the Overview of xilinx flow



h**p://www.xilinx.com/itp/xilinx7/books/data/docs/dev/dev0013_5.html


Another Simulator ...Active HDL

h**p://www.aldec.com/activehdl/

Tutorial Active HDL....

h**p://www.aldec.com/products/active-hdl/multimediademo/
 
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