kh9341101
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Hi, I am a student from Taiwan.
Trying to write a verilog code for ultrasonic sensor HC SR04.
Here is my code
And I use Cyclone IV EP4CE22F17C6,
but everytime I load in the code,
The led doesn't react correcting,
it blinks and blinks...
I thought it was because I didn't give the trig and echo 5v,
but after evaluate the voltage,
it still turns out failure.
Is there any problem to my code?
Thank you!
Trying to write a verilog code for ultrasonic sensor HC SR04.
Here is my code
Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 module ultrasonic(clk,fpga_rst,trig,echo,lights); input clk; input fpga_rst; input echo; output trig; reg [16:0] t; reg [16:0] s; output reg [7:0] lights; reg [19:0] cnt; pll1 pll1( .inclk0(clk), .c0(clk_div) ) ; always@(posedge clk_div) begin if(!fpga_rst) cnt<=17'b0; else if(cnt>=17'b1_1000_1000_0000_0000) cnt<=17'b0; else cnt<=cnt+17'b1; end reg trig; always@(posedge clk_div) begin if(!fpga_rst) trig<=1'b0; else if((cnt>=20'b1_0100)&&(cnt<=20'b10_1000)) trig<=1'b1; else trig<=1'b0; end always@(posedge clk_div) begin if(!fpga_rst) t<=17'b0; else if((cnt>=20'b1_0100)&&(cnt<=20'b10_1000)) t<=17'b0; else if(echo) t<=t+17'b1; end always@(posedge clk_div) begin if(!fpga_rst) s<=17'd0; else if(cnt<20'b1010) s<=t/58; end always@(*) begin if(s<3'b10_1111) lights=8'b00001111; else lights=8'b11110000; end endmodule
And I use Cyclone IV EP4CE22F17C6,
but everytime I load in the code,
The led doesn't react correcting,
it blinks and blinks...
I thought it was because I didn't give the trig and echo 5v,
but after evaluate the voltage,
it still turns out failure.
Is there any problem to my code?
Thank you!
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