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HARDWARE INTERRUPTS AND SOFTWARE INTERRUPTS

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rakesh_aadhimoolam

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hi:::::::::::::::::::::::::::::::::::::::::::::::;;;;;

i need to know the basic functionality of hardware and software interrupts and their differences..........

please help me understand that.............

and also i want to know the best book for microprocessor 8085

..........thank you
 

Hi
I think, a hardware interrupt is a interrupt made by one peripheral by sending one electrical signal to interrupt pin of CPU. But a software interrupt is one interrupt made by programmer by using one special instruction of CPU.
CPU reponds both interrupt in the same way.
Regards
Muoinho
 

µPs & µC respond to interupts when interupt request flags are set
a flag is usually single bit in the processor RAM

with hardware interupts - the hardware sets the flags
the hardware may be internal or external to the chip

with software interupts - code instructions will set the request flags

flags are reset by hardware or software depending on the chip design

some interupt flags can be masked to prevent an interupt occuring
some interupts cannot be masked - usually a high priority task

many processors can have a priority structure assigned to the interupts
so that simultaneous interupts will be processed in a desired order.

there some types of interupt which start the process in hardware then the hardware provides some software (data) to direct the processor in its task

there is no fixed design of interupt structure - all have good & bad points

hope this helps Polymath
 

Software int.:
when you set the timer and it flow - > this make soft int in some bit
Hardware:
put signal line ot int port and when pulse come down -> this make har int

this is simple example for int on 8051
 

hai
i think there's a confusion
the hardware interrupt/delay can be specifiesd as the one which occurs without the knowledge of the system.when u activate a timer,the system can be busy with some other processes and when the timer overflows,it will inform the system and the currusponding isr will be worked out.
in case of software interrupt,the user software will force the system toperform the isr according to the specs of the software.
in detailwe can say that,whenever an interrupt occurs,the system will jump to the interrupt vector and performs the isr written there.
that means by writing the code down will perform a software interrupt (for 8051)
ORG 0000H
SJMP START
ORG 0003H
MAIN: ----
(isr)
-------------


ORG 0040H
-------------
-------------
-------------
SJMP MAIN


END
here when ever the software come to the last step,the system willperform the isr.this is called software interrupt

regards
sun
 

"hardwre interrupts" is just a jargon for "interrupts"
"software interrupts" are also called BIOS calls.
The main difference is that with hardware interrupts you have to provide the function yourself, while with BIOS calls the functions are built into BIOS (hence the name) and you only have to give the input in the proper format.

for more information:
h**p://user.chem.tue.nl/jakvijn/tonc/swi.htm ---s/w ints---
h**p://user.chem.tue.nl/jakvijn/tonc/interrupts.htm ---h/w ints---
 

sunish
the hardware interrupt/delay can be specifiesd as the one which occurs without the knowledge of the system.
FACT
ALL interupt systems on synchronous processors work through the setting of interupt flags.
These flags may or may not be accessible to the user or end process.
Once a flag is set the system (the silicon) knows about it - so no interupt can occur without the knowledge of the system
It may be transparent to the user or end process - but the system still knows about it.
Without knowledge of it the system could not respond.


ivar4ever
"hardwre interrupts" is just a jargon for "interrupts"
"software interrupts" are also called BIOS calls.

As I said earlier - there are distinct differences between Hardware and Software initiated interupts and to describe them all as the same is misleading.
Some hardware interupts initiate processes within specialised silicon engines within the main silicon eg. USB engines built in µC. These are not accessible to the user but are triggered by external hardware interupts (the change in a clock or data signal). When they have completed their task they inturn generate a hardware interupt for the system to service - they set a flag.

ivar4ever
If a µC has no BIOS (and most do not) how do you generate a software interupt?
By your description .... No BIOS=No interupts - so µCs without a BIOS cannot have interputs? I do not think that is accurate.


Polymath
 

Hi all,
personally I think that you should also specify the environment (CPU and OS) when you talk about SWI. In fact while HWIs are implemented more or less in the same way in every processor by hardware (depending or not the user can access to flag, IRQ control registers or whatelse), SWI is mainly a SW concept.
SWI implementation is strictly connected to the OS which supports this feature. For istance in DSP/BIOS (OS running on DSPs by Texas Instruments), SWI is a particular group of Tasks which share a common stack (= memory area) for all the priority levels, while the so called "Tasks" have separate stack areas.
So SWI are special tasks which allow a fast context switch during preemption.
In other environments the term SWI could refers to something different.

Bye
Mowgli
 

mowgli
SWI implementation is strictly connected to the OS which supports this feature
This cannot be true - or are you saying that µCs that have no OS can not implement a software interupt?

So SWI are special tasks which allow a fast context switch during preemption.
What caused the implementation of this TASK? The software setting of a flag?

As I said - with software interupts - the software/firmware set the interupt flags and the silicon responds according to its design.

Do not complicate the topic with divergent talk of stacks and OS etc.
rakesh asked for a basic knowledge - trust software engineers to misunderstand, complicate and redefine.

rakesh_aadhimoolam
i need to know the basic functionality of hardware and software interrupts and their differences..........

K.I.S.S.

regards Polymath
 

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