Hardware architecture for image classification using Support Vector Machine

[Vani's]

Hai sir
I am working on image classification using support vector machines, where the images are to be classified using support vector machines(SVM).
So will you suggest me any idea for:
- how to read an image using vhdl code to dump into a FPGA kit
- how to develop a svm architecture and the software requirements


any Suggestions Plz send to
vani.samineni006@gmail.com

 

[TrickyDicky]

post what you've done so far.
PS. you wouldnt use VHDL to load an image into an FPGA from an external source.

 

[Vani's]

post what you've done so far.
PS. you wouldnt use VHDL to load an image into an FPGA from an external source.

Thanq regarding the rply sir
I just started my project sir, I developed a vhdl code for the svm classification function.
I need to know that how svm algorithm is generated.

 

[mrflibble]

I just started my project sir, I developed a vhdl code for the svm classification function.

I think TrickyDicky meant also post the code of what you have done so far. Less guessing required...

 

[Vani's]

I think TrickyDicky meant also post the code of what you have done so far. Less guessing required...

Will you suggest me any way that to read an image in .coe format

 

[mrflibble]

No I will not. I will however suggest googling on something like "xilinx read .coe file format vhdl" because the information on how to do that is absolutely trivial to find on this here fine internet.