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H-bridge inverter circuit using ir2110 mosfet driver

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paulmdrdo

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Good day everyone! I have built the circuit attached herein on a PCB. The driver section and the half-bridge circuit were tested individually and worked fine. But when I try to combine them the IR2110 always blows up. And the output of the 12v supply that I used to power the vcc pin of the IR2110 gets messed up as well. I used 80v ac coming from a variac. How do I fix this problem? Note: the SD pin 11 of the IR2110 is tied to ground during the testing and the frequency coming from the VCO is 80khz. The circuit is from this website http://www.imajeenyus.com/electronics/20110514_power_ultrasonic_driver/index.shtml with a demo of a working unit. I really need your help with this one. Thank you!
QUESTIONS4.pngQUESTIONS2.pngQUESTIONS3.png
 
Last edited:

Hi,

In my eyes a single sided PCB is not suitable for this application.
But even worse:
The separation of driver and Mosfets in two different PCBs.They should be in close proximity with very low impedance connection.
With wiring, maybe lengthy, maybe not twisted .... this will be impossible.

Klaus
 

DSCN4077.JPG the website where I get the circuit from has shown a working unit with exactly the same setup I made. How was he able to make it work?
 

Hi,

From the schematic it may work, every simulator may say it works....But there is a lot "undefined".

Maybe with 10cm of wiring length it works, maybe with 12cm not.
Maybe with wires in close priximity it works, mabye with random wiring it does not.
Maybe with GND star wiring it works, maybe with random GND wiring it does not.
Maybe with the one power supply it works, maybe with another power supply it does not.
Maybe today it works, maybe tomorrow it does not.

It's a fragile system.

It's like building a stack of random stones. One person may be able to stack 8 stones on each other, while another person has problems with 3 stones.
But common to all stacks is that they will fall apart easily.

Klaus
 
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    asdf44

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Hello,

So it seems I have to put together the driver circuit and the mosfet circuit in one PCB. Do I also have to include the VCO circuit and the circuit for the dead-time in a single board with the mosfet and driver? Thank you.
 

Hi,

the most critical signals are high current with fast rise/fall rate.

In this case the gate driver signals may carry some 100mA maybe just within the first 100ns.
Thus the traces from driver IC to gate .. and for sure the return paths: mosfet_source back to the driver IC.
If they are not low impedance .. at first you will see drity signals with ringing, then with incresing impedance heavier ringing, maybe with voltages beyond specifications, increased heating increased EMI, up to complete failure.

The logic level signals don´t carry much current. Thus they are less critical. Additionally the driver IC has some schmitt trigger inputs. The hysteresis helps to ensure proper function.
But GND is the reference of the signal. Thus you still have to take care about GND wiring.

Klaus
 

Hi,

The logic level signals don´t carry much current. Thus they are less critical. Additionally the driver IC has some schmitt trigger inputs. The hysteresis helps to ensure proper function.
But GND is the reference of the signal. Thus you still have to take care about GND wiring.

Klaus

About the GND connection. Looking at the IR2110 datasheet, the Logic side has a different supply and GND than the Driver side. To my understanding, those GNDs should not be the same is that correct?
Kindly suggest a proper way of the grounding connection? Thank you.
 
Last edited:

Hi,

Did you go through te documents provided by the manufacturer?
https://www.infineon.com/cms/en/product/power/gate-driver-ics/ir2110/#!documents
I recommend to read through them. You don´t need to read and understand every single word. But you should get an overview.
Very useful are: "application notes" and the "user manual".

*****

You talk about VSS and COM.
* VSS is the logic side reference
* COM is the low side driver reference.

In the "Absolute maximum ratings" you see the limits you must not cross. Never. Not for a microsecond. Not at power up or power down. Else you risk damage of the device.
In the "Recommendend Operating Conditions" you see that VSS is limited to +/-5V wrt. COM.
Within these limits you are safe, even for a long time.

On the other hand theses limits tell you that VSS must not float wrt. COM. You have to ensure this.

I recommend to connect the VSS signal and the COM signal but with intelligent wiring.
COM needs a short and wide connection directly to the low side MOSEFT_Source. MOSFET source is the reference point to drive the MOSFET´s gate. And this is the job of the driver IC.
Mosfet Source should have a GND plane for the bulk capacitor and the fast capacitor to the high side_drain.

I´d choose the bulk_capacitor_GND connection as GND star point. (also connect the power supply_GND here ... and all other circuit that refers to the same GND)

You may use an extra trace from bulk_capacitor_GND to the logic section gnd_plane. But take care that no pulsed current should be carried by this wire.

It´s all not that easy to explain, because every other connection may have an influence. Avoid GND_loops.

Klaus
 

Hi,

The power bus voltage needs to be bypassed.
You need one big bulk capcacitor, usually an electrolytics. It needs to store some energy.
Then you need a fast capacitor, usually a ceramic ot foil one, this is to take care of the fast edges caused by the switching.
... to stabilize the voltage, to reduce EMI.
Both capacitors are in parallel, the lower end to GND plane, the upper to the power bus voltage.
The fast capacitor needs to placed very close to the drain of the high side Mosfet.
This also reducecs high voltage peaks that may harm the Mosfets.

Ground plane should be clear, hopefully.
Just a rock solid plane to get a stable reference.

Klaus
 

Hello,

I was reading an appnote about IR2110 and in the LAYOUT GUIDLINES section it says "..each MOSFET should have a dedicated connection going
directly to the pin of the MGD for the return of the gate drive signal. Best results are obtained
with a twisted pair connected, on one side, to gate and source, on the other side, to gate drive
and gate drive return."

My question is what is the reason behind using twisted pair?
 

Hi,

My question is what is the reason behind using twisted pair?
This reduces stray inductance.
(additionally it reduces EMI and EMC problems)

Klaus
 
newpcb2.PNGnewpcb1.PNG Good day KlausST! Can you check if my pcb layout is any good. I based this from the schematic from post#1. Thank you!
 

According to the post #1 schematic, the current measurement is low bandwidth only. Thus I wonder, if the 680 nF capacitors shouldn't be connect directly across the half bridge, eliminating unwanted DC bus inductance.

I also feel that the gate drive is too hard and should use series gate resistors, probably the well known resistor diode circuit for fast off, slower on. Presently parasitic oscillation might have killed the FETs.

It's always suggested to start power stage operation with a current limited supply and incrementally rising voltage, giving a chance to detect parasitic oscillations before they destroy the circuit.
 
Hi,

The PCB layout is much better now.

Some issues
* SD input is not connected to the IR2110
* rectifier_minus is not connected to the copper_fill_GND
* I miss a fast capacitor from GND to high side Mosfet drain, short wiring.
* For 12V bypass, 5V bypass and fir the bootstrap circuit use fast capacitors (no electrolytics)

Klaus
 
Hello,

I've fixed all of the issues you mentioned except for this one.
"* I miss a fast capacitor from GND to high side Mosfet drain, short wiring."

I did not quite get it, high side's mosfet drain is not connected to ground nor to fast cap. How do you mean?

Please kindly check this again. Thank you!
newpcb3.PNGnewpcb4.PNG
 
Hi,

I did not quite get it, high side's mosfet drain is not connected to ground nor to fast cap. How do you mean?
Yes, therefore I miss it.
--> add a fast capacitor. One leg to GND, the other leg to Mosfet_drain.

Klaus
 
Hello again,

Thank you! Can you briefly explain the benefit of the added fast cap? And What value of fast cap do you suggest?
 

Hi,

Ok i try it briefly: Read post#10. ;-)

The value depends on the used bulk capacitior, dI/dt (riserate of current), expected voltage drop / ringing, EMI requirements.
Often a 100nF ceramics is used.

Klaus
 

Hello,

Can I use mylar cap for this one? I can't seem to find a 100nf ceramic capacitor with 200v rating in my area.
 

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