Global excluded pins in clock tree specification file

[biju4u90]

For doing CTS in SOC Encounter, I created the clock tree specification file by selecting the available clock buffers from my library. When I look into the .ctstch file, I see lots of pins described as globally excluded pins. A few pins from the report are added here.

#Excluded pin under I_ZMCU/I_BEXTBUS/I_BCKP/UCKP004/usb_ce_reg/CLK
GlobalExcludedPin
+ I_ZMCU/I_BEXTBUS/I_BCKP/UCKP004/crd_ce0_reg/SIN
+ I_ZMCU/I_ZBHPHE/I_BPUSB/I_F_USBFU2/U12/A

#Excluded pin under X0
GlobalExcludedPin
+ I_ZPUC/I_BG4ACCTL/PLL_WPP/g301/D1
+ I_ZPUC/I_BG4ACCTL/DSU/M_PCLK_MGCK/GATCLK/CLK
+ I_ZPUC/I_BG4ACGEN/MC/PLLI_GCK/GATCLK/CLK
+ I_ZPUC/I_BG4ACGEN/SEL/SUBCK_GCK/GATCLK/CLK
+ I_ZPUC/I_BG4ACGEN/SEL/MAIN22_GCK/GATCLK/CLK

What could be the reason for excluding these pins?? Is it fine to proceed to the CTS stage with this .ctstch file?