Getting parameters of a 4 layer PCB

[Navya]

Hi,

we have a 4 layer pcb (0.5mm thick) with layers of the order
1st layer- signal
2nd layer-GND
3rd layer-Signal
4th layer-signal
with power signal routed in the signal layers...
Plz help me to find the track impedance, trace width, spacing between layers, thickness of core used etc.

In the documents which i had seen there was a power plane and ground plane for four layer. can we give only ground plane and the rest of the power signal routed properly for each signal layer?

 

[venkat_kvr]

Re: pcb layer stack up

The problem with this stack up is u dont achive the controlled impeadance for the the traces on the bottom layer signals.U didnot specified how much impedance u wantbased on tht thickness of the dielectric i.e. spacing between the layeres and width will vary.If u have any high speed signalson the board my suggested stackup is
----------top layer
---------Prepeg(dielectric)
---------Ground
---------Core(dielectric)
---------POWER
---------Prepeg(dielectric)
---------Bottom layer

 

[buenos]

pcb layer stack up

yes, "venkat_kvr" has wright.

and you have to make both the planes to be continous under the signals. (at lest that plane which is closer in the 4 layer stackup.)

If you change layer for a signal, far from the ICs, then it can work up to 100MHz if the traces are short. otherwise U need more GND planes, or you have to route the high speed signals without layer changes.

 

[Rame]

Re: pcb layer stack up

Hi,

For controlled impedance boards,the layer stack up what you have mentioned in your previous mail seems not a solution for your queries.



-----Top
-----Gnd
-----Pwr
-----Bot


The layer stackup above will be ideal for you to go for..

Regards

Ramesh

Added after 1 minutes:

Hi,

For controlled impedance boards,the layer stack up what you have mentioned in your previous mail seems not a solution for your queries.



-----Top
-----Gnd
-----Pwr
-----Bot


The layer stackup above will be ideal for you to go for..

Regards

Ramesh

 

[Navya]

Re: pcb layer stack up

Hi,
we dnt have any critical signals ,I think most of u dint understand my query...
I will explain u once again

We are in need of a Cardbus standard PCB with the following specs:

No: of layers - 4
Layer 1 - Signal/routed power
Layer 2 - Ground
Layer 3 - Signal/routed power
Layer 4 - Signal/routed power

Finished Board thickness - 0.5mm.board dimension is (72x47mm)

We need a layer stackup that will ensure 60 - 90ohm trace impedance in all signal layers.
I have seen in many sites with power and GND planes in btwn the signal layers. But we want a stack up as i mentioned above. But i am not sure about the trace width, trace seperation distance, material thickness etc.(for which i want your help)
Anybody who have experienc ein the field of pcb stack up please help me ASAP
http://www.hottconsultants.com/techtips/pcb-stack-up-2.html(for your reference)

 

[venkat_kvr]

Re: pcb layer stack up

here i am attaching the stack up for the following combinations
1. signal
ground
power
signal
2. signal
siganl
signal
siganl

 

[Navya]

Re: pcb layer stack up

Thanks for the help
please clear some of my doubts too
Can we use the signal/power layer instead of power layer alone?(3rd layer)?
In the second option that u have given impedance is in 500 range(we want impedance of 60 ohm-90ohms ) per layer.

 

[venkat_kvr]

Re: pcb layer stack up

In the tool i am using, i dont have any option to use signal/power as layer.The reason y u r getting 500ohms is u dont have any refernce for the signals.i am sure with out planes u dont get 60 ohms to 100 ohms range impdance.

 

[Navya]

Re: pcb layer stack up

But we are having one plane(Ground) wont the impedance be then made in the range of 60-100 ohms?
In the following link
h**p://www.hottconsultants.com/techtips/pcb-stack-up-2.html
its said that we can make a stack up like
1-signal/power
2.GND
3.Signal/power
4.signal/power

 

[venkat_kvr]

Re: pcb layer stack up

u can get tht but i want to know how r u going to route ,whts the minimum trace width u want to use based on tht we can calculate the spacing betwen the trace and plane to get the required impedance .

 

[Navya]

Re: pcb layer stack up

we are planning to have the trace width to be min (12 mils-10 mils).
Is it like we have to decide the core thickness, prepeg distance , copper thickness etc?

Can you briefly explain?and also plz tell it too..
what is meant by base and finish thickness? Plz differentiate

 

[generalacct]

Re: pcb layer stack up

Base Thickness = copper thickness of raw PCB laminate
Finished Thickness = copper thickness after electroless or electroplate process.

 

[melc]

Re: pcb layer stack up

we are planning to have the trace width to be min (12 mils-10 mils).
Is it like we have to decide the core thickness, prepeg distance , copper thickness etc?

Can you briefly explain?and also plz tell it too..
what is meant by base and finish thickness? Plz differentiate

1. do not route anything untill you have talk with your board house
2. the standard finished PCB thickness for cardbus (PCMCIA) is 0.45 to max0.7mm, and depends by the connector type. Overall thickness including components and package is 5mm for TYPE II card. Standardized copper thickness for such design is 0.5 oz signal layers, 0.5 oz to 1oz ground layers.
3. If you need anything else than I presumed take the standard and read it
4. You have highspeed buses in cardbus (around 33Mhz) so impedance of the traces are important

 

[Navya]

Re: pcb layer stack up

Thanks for the help. In our pcn stack up,

The copper base thickness on each layer – 0.5 oz or 0.6693 mils.

Finished copper thickness on each layer – 1.25 oz (i.e. 0.5 oz+ 0.75 oz) or 1.722 mils.
Our pcb board thickness is 5mm


The single ended trace impedance on all signal layers must be a min of 60 ohms and a max of 90 ohms
There will be +/-10% tolerance in fabrication .So can you please tell the specific value that we should choose for the target impedance?
Also we want to know the thickness of each layer, core thickness, prepeg thickness,trace width, spacing between each trace etc.

Plz help asap

 

[melc]

Re: pcb layer stack up

Thanks for the help. In our pcn stack up,

The copper base thickness on each layer – 0.5 oz or 0.6693 mils.

Finished copper thickness on each layer – 1.25 oz (i.e. 0.5 oz+ 0.75 oz) or 1.722 mils.
Our pcb board thickness is 5mm


The single ended trace impedance on all signal layers must be a min of 60 ohms and a max of 90 ohms

I'm designing always with 50ohm impedance, but from my experience on short lines (up to 5cm or 2 inch lenght ) there is no problem if the impedance is as high as 60 ohm or 90 ohm if all data lines has the same impedance. On RF lines and high frequency (2.5Ghz or more) is different, line should be kept at 50ohm

There will be +/-10% tolerance in fabrication .So can you please tell the specific value that we should choose for the target impedance?

The 10% tolerance is in the epsilon value (dielectric constant) which shoud be choosed around 4 (3.6 to 4.2) for FR4 material

Also we want to know the thickness of each layer, core thickness, prepeg thickness,trace width, spacing between each trace etc.

Use equal thickness for each layer and prepreg. Trace width is a problem of impedance and current flow. Spacing between traces is a problem of isolation (here there is no such issue because everything is 5V or 3.3V) and crosstalk.
Use larger isolation (greater than 20mil) for routing clocks or data busses.
Separe data busses from analog signals
The minimal route width/isolation is often 4mil for such design. If you have empty space use 8mil or even more.

Plz help asap

 

[Navya]

Re: pcb layer stack up

So can i move forward with a target impedance of 70 ohms?
trace width of 8 mils?
we need the help to arrange the prepeg, core inbtween the layers of the stack up (of 20 mils=0.5mm) with the following order(with thickness mentioned in the right side)
layer1-signal/power
layer2-GND
layer3-Signal/power
layer4-signal/power

Can you please provide this information too?

 

[melc]

Re: pcb layer stack up

So can i move forward with a target impedance of 70 ohms?
trace width of 8 mils?

How do you expect I can answer without knowing anything about your schematic ? If you have only 33MHz buses and no RF the answer is yes as long every signal route has the same lenght

we need the help to arrange the prepeg, core inbtween the layers of the stack up (of 20 mils=0.5mm) with the following order(with thickness mentioned in the right side)

On this layer stack I'll keep restictive impedance routes on layer1 and layer4 with a continous ground or power layer under them. Keep supply routes on layer 2 and layer 3 as much as possible. I can't choose for you the layer thickness you are routing so you know the impedance requirement.

layer1-signal/power
layer2-GND
layer3-Signal/power
layer4-signal/power

Can you please provide this information too?

 

[Navya]

Re: pcb layer stack up

I will draw and clear my doubt..My signal layer and prepeg thickness is 0.6mils.
I am confused where to place the prepeg and core.
From the online documents i came to know that there are two type of stack up constructions
core construction and foil construction
please find the attachments.
Suggest us where to place the core if the stack up is correct or plz correct if there is any mistake..
or is it like the 3rd attachment?(layer stack up)

expecting your valuable help

 

[buenos]

pcb layer stack up

in your drawing, signal3 doesnt have a good reference plane.

in my curren t project, i also use 3 signal layers, but also 3 planes, so the stackup is 6 layers. for high speed boards, i think N_planes>=N_signal is recommended.

 

[Navya]

Re: pcb layer stack up

Can anyone please help me to sort out this problem?
I want to know the thickness of each layer, order, trace thickness etc for the diagram attached.
I am not having the tool to design impedance controlled stack up. Anybody having its free version?