Non AMP

Getting image as input in verilog and how to display it

Thread starter Gohila
Start date Jul 9, 2014

Status: Not open for further replies.

Jul 9, 2014

#1

G

Gohila

Newbie level 1

How to display an image from Computer to FPGA and again from FPGA to computer using verilog

Status: Not open for further replies.

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