Full Member level 3
How do I convert the schematic into a verilog netlist that could be used in another tool?
This question is a little too generic. What is your source? How was the schematic generated? Does the tool you used to generate the schematic have the option to export Verilog?
Is this a SPICE circuit or, are you connecting gate in a schematic capture tool? I believe the tool should be able to export Verilog if you are connecting gates in the schematic capture tool.
So I'm still not sure how you got the design into the schematic tool. Did you instantiate gates or transistors? If you instantiated gates then the tool should export gates in verilog. If you instantiated transistors then I'm not sure what you should do.