mehanathan
Newbie level 4
Sir/Madam,
I am trying to generate a low going pulse of 100ns and after 100ns the pulse must be HIGH.
I am using a clock of 50MHz.
Methods i have used so far but couldnot synthesize it.
1. Using a counter to count upto 5 and after 5 the reset pin goes high. it was simulated but couldnot synthesize.
2. Using a shift register of 5 flipflops and propagating HIGH after 5 clock pulses.
Above all two programs was simulated but i couldnot synthesize in Signaltap analyzer.
In signaltap analyzer the pulse remains HIGH always...
I have attached the simulation graph too..
I am trying to generate a low going pulse of 100ns and after 100ns the pulse must be HIGH.
I am using a clock of 50MHz.
Methods i have used so far but couldnot synthesize it.
1. Using a counter to count upto 5 and after 5 the reset pin goes high. it was simulated but couldnot synthesize.
2. Using a shift register of 5 flipflops and propagating HIGH after 5 clock pulses.
Above all two programs was simulated but i couldnot synthesize in Signaltap analyzer.
In signaltap analyzer the pulse remains HIGH always...
I have attached the simulation graph too..