I have a divide-by-2 clock in the design which is then muxed with TEST_CLK and also another functional clock before being used in the design.
Now my question is what is the difference between creating a generated clock at the output of divider and creating a generated clock at the output of mux?
No difference. but I'd be more comfortable to generate a clock on the flop output since setting a clock on combinational logic requires to use dont_touch so that it won't be optimized away.
Will there be differences in where the muxes are placed? At the end of clock-tree trunk or at the start of it.
What I mean is that the clock output coming out of muxes will see bigger skew if the generating node was at the flop, although the flops being driven will not see any difference.
I am just trying to confirm my understanding on how clock tree is built.