please help me... I'm using verilog... I'll be having an input clock of say 1Mhz.. I need to produce a signal twice as fast as the input clock... please help
If you're using a Xilinx FPGA you may use a DCM primitive with Digital Frequency Synthesis option to generate multiples. Even Clk_2X is supported in DCM.
please help me... I'm using verilog... I'll be having an input clock of say 1Mhz.. I need to produce a signal twice as fast as the input clock... please help
It depends on which vendor device you are using to. For xilinx you can use DCM from Logicore IP wizard and similarly for Altera you can use PLL megawizard to implement the clock multiplier.