Hello,
I would like to generate a clock of frequency 1.6MHz from an external clock of 100KHz using spartan 3A FPGA?i am using verilog HDL for programming.I am very new to FPGAs.I would appreciate help and suggestions.
I just wanted to know whether it is possible to generate high frequency signals from low frequency signal.I know that u can do that by using DCM.But the minimum frequency should be 5MHz.so i wanted to know is there any other way.
Thank u for reply.
Seems to be the theme of this month. Lots of posts that could have been answered by the poster him/herself by 1) googling and reading hit numero uno, OR 2) just reading the fine datasheet. Welcome to humanity.
But to be fair, this particular post isn't so bad in that regard. He just asked for alternatives bsides using the DCM. No easy alternatives that make sense, hence the easy answer of "no, not possible"