gated clocks and resets in cdc check

[rocking_vlsi]

Hi

how to handle gated clocks and resets in Spyglass CDC check.

from which rules i should start debug the voilations.

 

[dftrtl]

What do you want to do with gated clocks.
Do you want to get them gated. If yes then set case analysis, that will gate the clocks.

Resets depends on how they are used in design.