Gated clock - Difficult to verify in GLS ,
Physical perspective - more insertion delay for clock tree
Inreases area , complicates timing closure with all the clock gating checks.... (just a lil bit)
Hi,
Yes it's advantage is to reduce the consumed dynamic power. However the advantage is the complexity of implementations (the logic of gating controler) as well as the additional area taken by this controller.
Hi,
Yes it's advantage is to reduce the consumed dynamic power. However the advantage is the complexity of implementations (the logic of gating controler) as well as the additional area taken by this controller.
Yes it's advantage is to reduce the consumed dynamic power. However the disadvantage is the complexity of implementations (the logic of gating controler) as well as the additional area taken by this controller