Full custom "shemoFPGA" configuration SRAM design.

[shemo]

Hi
I have some architecture questions related to a new FPGA.

Here I have some Logic block, switch block, and IO block. Each block has some configuration SRAMs to control the circuitry.

How would you design a way to program those SRAM bits?
1)Do you need to assign a unique identifier to identify the block. Like using the (x,y) coordinate. But the switch blocks are between the logic blocks.

for example, how would you program the SRAM bits for switch block number 2(the 2nd pink one)?

 

[dpaul]

Re: New ASIC or FPGA SRAM bit programming.

Again back with the same post with just the title changed?
"Custom FPGA Programming architecture." - was moved to the proper forum by the Mods.

Hi
I have some architecture questions related to a new FPGA.

Then you are in the wrong forum my friend. Put your question to "PLD, SPLD, GAL, CPLD, FPGA Design" forum.

 

[ads-ee]

Re: New ASIC or FPGA SRAM bit programming.

Again back with the same post with just the title changed?
"Custom FPGA Programming architecture." - was moved to the proper forum by the Mods.

Then you are in the wrong forum my friend. Put your question to "PLD, SPLD, GAL, CPLD, FPGA Design" forum.

No this is NOT and FPGA question it is about designing their own FULL CUSTOM FPGA. Therefore it IS an ASIC question. I'm the moderator that moved it here.

There I changed the title so it's obvious it's about a full custom design and not some Altera, Xilinx, Actel, or other FPGA company.

 

[dpaul]

Re: New ASIC or FPGA SRAM bit programming.

Didn't know that Mods. here can also modify the thread title. I have to be more careful in the future when posting something of my own.