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Full Chip EM simulation using Ansoft HFSS

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jslee

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hfss reference conductor

Hi, I wanna make a full EM simulation of a RF chip, made of TSMC 0.18um CMOS technology. The discription of this chip's structure is as follows. It contains many inductors and interconnects, which are surrounded by a metal ring. This metal ring will serve as a reference ground for my circuit.

In order to make a EM simulation to get the coupling effect between the inductors and interconnects, many lumped ports should be inserted inside the structure. I have no idea how to assign the lumped correctly. Taking a long interconnect in the circuit for instance, the metal of the interconnect is served as the conductor in the setup of lumped port. But how about the reference conductor? The reference conductor of my chip surrounds the chip and it is not same height as the interconnect. Besides, they are far away from each other. I do not know how to setup these lumped ports correctly.

I have a simple idea. However, I do not know if it applys.
I think I may add a metal sheet on the bottom of the chip and assign its boundary condition as a perfect E. The distance between the interconnect and the added metal sheet is around 300um. Therefore, I can plot a surface between the interconnect and the metal sheet and so I can assign a lumped port. By doing this way, all of lumped ports insides the chip have the same reference. After completed the simulation, the sNp file can be exported and makes a post processing and assinged the reference to ground potential.

Is it feasible? Please give me your precious suggestions.
Thank you.
 

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