dingo100
Newbie level 1
Hi ,
i am designing a full bridge converter (SMPS) using two single out low side drivers.
to drive the high side MOSFETs i am using two 1:1 :1 gate drive transformers. 1 primary and 2 secondary windings for the gate drive tx. each gate drive tx drive the diagonal MOSFETs of the full bridge.
two avoid the saturation in series with the primary side of the tx a 0.1uF cap has been used, to reconstruct the signal on the secondary of the gate drive tx 0.1 cap and diode has been used for the 2 secondary windings.
the issue is, for the low side signal there is a shift from reference about 5v and for the high side signal it around 1v is observed, which may be acceptable.
can i get a tip why the low side gate signal shifted from the reference by around 5V.
i am designing a full bridge converter (SMPS) using two single out low side drivers.
to drive the high side MOSFETs i am using two 1:1 :1 gate drive transformers. 1 primary and 2 secondary windings for the gate drive tx. each gate drive tx drive the diagonal MOSFETs of the full bridge.
two avoid the saturation in series with the primary side of the tx a 0.1uF cap has been used, to reconstruct the signal on the secondary of the gate drive tx 0.1 cap and diode has been used for the 2 secondary windings.
the issue is, for the low side signal there is a shift from reference about 5v and for the high side signal it around 1v is observed, which may be acceptable.
can i get a tip why the low side gate signal shifted from the reference by around 5V.
