general drift frequencies
Yes;if your Reference frequency generator needs to be highly stable as this is the only input you have to be locked to!!!Think of a situation were both your REF is unstable;how will your feedbvack VCO signal lock!
After all we are using PLL to generate a stable and reliable frequency inorder to prevent errors in any communications systems.
Added after 1 hours 33 minutes:
Buyan,
You need to measure your PLL phase noise at specific offset frequencies using psectrum analyzer as recommended for your applications.e.g 10 HZ,10KHZ,100KHZ,1MHZ and compare with the recomendation as per dBc/HZ
If this is met your PLL works and you should look at other parts of your system as recommended earlier.
Refer to the following applications notes:
1.Phase-locked loops for high-frequency receivers and transmitters- Part 1 and 2
by Mike Curtin and Paul O'Brien)
2.Maxim (APPLICATION NOTE 698)
3.How to debug a PLL frequency synthesizer by Bob kelly
Note carefully here;
Phase Noise in Oscillators:
•Because the LO signal is mixed with the received signal, any noise generated by the oscillator itself will add to the receiver noise.
•The predominant LO noise is referred to as phase noise because it appears as phase modulation of the LO signal.
.Any poorly desined VCO,the phase noise can seriously degrade the receiver performance
Remember!! That the higher the VCO gain, the more susceptible it becomes to external sources of noise and interference.
Finally follow the folowing design procedures for any PLL design:
Design Procedure for Phase Locked Loops:
1. Choose your VCO.
•If you are buying in a ready-made VCO, then obviously it must cover the range of frequencies that you expect, and with a given range of control voltage.
•The operating voltage and temperature range must be compatible with your requirements and, for battery-powered equipment, the supply current is also important.
• Check that the phase noise is acceptable (usually a figure is given for 10kHz offset, but more recently the figure may be given for integrated phase noise).
•If you are designing your own VCO, then follow the guidelines given below.
•
2. Choose your synthesizer chip.
•Practically all of the currently available synthesizer chips use a ‘charge-pump’ type phase detector.
•These offer several benefits over the older ‘voltage’ type phase detector, one of which is that it uses a passive loop filter instead of an active (op-amp based) filter.
Note:
•Unless your VCO is only required to operate at a single fixed frequency (as for a second LO in a dual conversion receiver), you will need a dual-modulus synthesizer with a built-in prescaler.
•Divider ratios available are typically 8/9, 32/33, 64/65 or 128/129.
•The choice will depend upon your VCO frequency (higher frequencies will need a larger division in the prescaler) and the maximum operating frequency of the main synthesizer block.
• The LMX2316 is an inexpensive low power type for use up to 1.2GHz and is an excellent choice for battery-powered equipment.
• For a higher performance, the LMX2325 might be considered.
• Other synthesizer manufacturers include Philips, Motorola and AMD.
3. Choose your ‘comparator’ frequency. (PFD input frequency)
•For multi-channel equipment, this will be pre-determined by the channel spacing - e.g. for GSM applications, the channel spacing is 200kHz and hence the comparator frequency should also be 200kHz.
•For PMR applications, the channel spacing is 12.5kHz and the comparator frequency will therefore also be 12.5kHz.
• Note that the comparator frequency must also be an exact sub-multiple of the VCO frequency - for example, 144.1MHz will divide by 0.0125, but 144.13MHz will not.
•For this reason, 144.13MHz would not be a viable channel frequency.
4. Choose your reference frequency
•The reference must be divisible by a whole number to give your comparator frequency.
•13 MHz will divide by 65 to give 200kHz or by 1,040 to give 12.5kHz, but 18.432MHz (a standard reference for DECT) cannot be divided to give 200kHz or 12.5kHz.
•In order to reduce the probability of in-band spurious products, it is a good idea to make the reference frequency as high as possible, although this will usually be limited by the maximum available divider ratio in the synthesizer chip.
•The reference oscillator is the main factor in determining the overall frequency stability of the system and also the phase noise performance inside the loop bandwidth.
• A simple crystal oscillator will have good phase noise, but relatively poor frequency stability with temperature variation.
•It is better to use a TCXO (Temperature Controlled crystal Oscillator) or VTCXO (Voltage and Temperature Controlled crystal oscillator).
•The latter type permits fine adjustment of the frequency by an external voltage and is occasionally used to allow direct frequency modulation (within the loop bandwidth).
5. Choose your loop bandwidth.
•As a general rule-of-thumb, the loop bandwidth should be a factor of ten times less than the phase comparator frequency.
•This allows adequate suppression of reference spurs, which would otherwise be present on the VCO output, giving the effect of greatly increased phase noise.
•Thus, for 200kHz channel spacing, the loop bandwidth should not exceed 20kHz, but for 12.5kHz channel spacing, the loop bandwidth must be only 1.25kHz.
•It follows that this also affects the loop settling time, which is a measure of how fast the loop can react to a change in frequency - the lower the loop bandwidth, the slower the settling time.
•Note: for this project, the loop bandwidth is chosen as the intersection point between the single side band phase noise of the VCO and the reference frequency
•Also we subtract 20 log 4 from the original values of the SSB phase noise due to the divide by 4 and it only applies to the Loop bandwidth frequency.
7.Determine the values for your Loop Filter.
•For most applications, a third-order loop is recommended - this means that in addition to the standard lead/lag-integrating network, there will be a further pole with a higher frequency break point.
•The purpose of this third pole is to attenuate the reference sidebands, which would otherwise appear on the VCO output to cause spurious responses in the adjacent channels.
• A typical loop filter is shown in the circuit at Figure below.
loop filter for a third-order loop.
•The lowpass filter effectively suppresses spurious signals produced by the phase detector so they do not cause unwanted frequency modulation in the VCO.
•The delay time of the filter, however, can result in degraded transient response and a limit in the switching speed of the frequency synthesizer.
•The transfer function of the third-order loop filter is given by;
Where Zfil2(s) describes the transfer function of the second-order loop filter given by:
Note but not sure: Interchange values of R2 and R3 for R1 and R2
•The main filter comprises C1, C2 and R1.
• R2, C3 provide an additional break point for the suppression of reference sidebands.
•The standard calculation invariably yields a high value for R2, but it is not always understood that R2 will directly add to the VCO noise figure.
•In practice, this value may be reduced within reason by scaling R2/C3, without significant effect on the main loop.
•Note that, for good noise performance, capacitors C1 and C2 should be high quality types.
•In order to calculate your loop filter, you will need the following information:
a). The charge-pump current. This is given in mA and will usually be in the range 1 - 10mA.
b). The VCO gain. This is given in MHz/V and will typically range from about 2MHz/V for a VCO in the 25 - 75MHz region to more than 50MHz/V for a VCO in the UHF bands. Because the VCO gain will not be constant across its control range, the mid-band value should be used. Some programs require this value in radians/sec, in which case the above figures should be multiplied by 2п x 106 Eg. 2MHz/V is equivalent to 12.56 x 10 6 rad/sec.
c). The total divider ratio, N (i.e. from VCO to comparator). Again, the mid-band value should be used.
d). The comparator frequency (in kHz). As already stated, this will usually be the same as the channel spacing.
e). Desired loop bandwidth (in kHz). In the absence of other directives, this should be one-tenth of the comparator frequency.
f). The desired Phase Margin. A good design should have a phase margin of not less than 40 degrees. Note that phase margin is also related to damping factor. For ‘critical damping’, d = 0.7, and this is equivalent to a phase margin of 37 degrees.
g). The minimum acceptable attenuation of the reference sidebands (specified by National as T1/T3 ratio). If sidebands are unimportant, this ratio can be 0% and the third pole (R2/C3) omitted. As was stated at the beginning of this section, it is not the purpose of this book to discuss ‘transfer functions’ and the complex math associated with calculation of loop filter values. Instead, it is expected that the practical engineer will use a computer program. I can recommend ‘EasyPLL’, which can be found on the Internet at:
Other Considerations:
•For good low-noise design, the power supply for the PLL must be stable and clean.
• It is therefore mandatory to use a separate, well-decoupled voltage regulator for the PLL section.
• For some very critical applications, the VCO will often have its own separate voltage regulator.
• Layout is also very important, especially in the area of the loop filter and VCO control line.
•The designer must ensure that the loop components are kept well away from any potential source of interference
•Digital switching signals can be especially problematic.
• Care must be taken with the routing of the reference (clock) signal, since any interference on this line will appear as spurs on the PLL output.
• Ideally, the entire PLL section should be self-contained in its own-screened compartment.
•Note: When the VCO is part of a phase locked loop, the phase detector (PFD) will effectively cancel the VCO noise within the loop bandwidth.
•Note: The dominant noise here is due to the synthesizer dividers and the reference frequency source.
•Outside the loop bandwidth, the VCO becomes the dominant noise source and the specification for a VCO will quote figures for SSB (single sideband) phase noise power at a specific offsets (1kHz, 10kHz and 100kHz) from the carrier or, alternatively, a figure may be given for the integrated phase noise (i.e. the integrated noise power over the output spectrum).
Added after 3 minutes:
Also note:
At lower frequencies rule for determing the loop bandwidth doesnt apply,rather you should look at the intersection of VCO Phase noise curve and reference curve where they cross is your loop bandwidth,
Hope all this helps