fractional-n pll phase noise

[hmsheng]

I measured a fractinal-N PLL. The in-band phase noise is -80dBc/Hz on integer mode. But when it works at fractional-N mode the in-band phase noise will be -60dBc/Hz. Mash1-1-1 ΣΔ modulator was used for fractional-N. The ΣΔ modulator is always on at both interger-N and fractionan-N mode. But at integer-N mode only integer part was connnected to the multi-module divider.

I checked all the circuits and they seems all right. What may be the cause of the 20dB phase noise degeneration at fractional-N mode?

 

[rfsystem]

Insufficient noise filtering of the sigma-delta noise

or

Frequency downconversion of folding of high-frequency noise because of nonlinearities.

 

[hmsheng]

Insufficient noise filtering of the sigma-delta noise

or

Frequency downconversion of folding of high-frequency noise because of nonlinearities.

1. PLL loop can't filte the in-band ΣΔ noise;
2. I simulated the folding of the high-frequency noise because of CP nonliearies but the contribution is only -80dBc/Hz with 10% CP mismatch. It's much less than the measured -60dBc/Hz.

So, any other reason else?

 

[jecyhale]

You should design a digital filter to remove ΣΔ noise rather than loop filter.
This technology is named noise shaping.

 

[hmsheng]

Mash1-1-1 ΣΔ modulator itself has noise shaping function.

 

[rfsystem]

Please check via simulation the delay impact of the VDD in terms of ps/V. Depending on the divider and the PFD circuit a phase modulation via supply noise is possible. If you then simulate with relaistic supply inductance/impedance you will get the possible source of the phase modulation. If the sigma-delta runs on the same supply it could easy ruin the performance.