Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

fractional-n pll phase noise

Status
Not open for further replies.

hmsheng

Full Member level 4
Joined
Dec 17, 2003
Messages
219
Helped
26
Reputation
52
Reaction score
10
Trophy points
1,298
Location
China
Activity points
1,556
I measured a fractinal-N PLL. The in-band phase noise is -80dBc/Hz on integer mode. But when it works at fractional-N mode the in-band phase noise will be -60dBc/Hz. Mash1-1-1 ΣΔ modulator was used for fractional-N. The ΣΔ modulator is always on at both interger-N and fractionan-N mode. But at integer-N mode only integer part was connnected to the multi-module divider.

I checked all the circuits and they seems all right. What may be the cause of the 20dB phase noise degeneration at fractional-N mode?
 

rfsystem

Advanced Member level 3
Joined
Feb 25, 2002
Messages
914
Helped
148
Reputation
292
Reaction score
38
Trophy points
1,308
Location
Germany
Activity points
9,550
Insufficient noise filtering of the sigma-delta noise

or

Frequency downconversion of folding of high-frequency noise because of nonlinearities.
 

hmsheng

Full Member level 4
Joined
Dec 17, 2003
Messages
219
Helped
26
Reputation
52
Reaction score
10
Trophy points
1,298
Location
China
Activity points
1,556
rfsystem said:
Insufficient noise filtering of the sigma-delta noise

or

Frequency downconversion of folding of high-frequency noise because of nonlinearities.

1. PLL loop can't filte the in-band ΣΔ noise;
2. I simulated the folding of the high-frequency noise because of CP nonliearies but the contribution is only -80dBc/Hz with 10% CP mismatch. It's much less than the measured -60dBc/Hz.

So, any other reason else?
 

jecyhale

Advanced Member level 1
Joined
Feb 19, 2008
Messages
403
Helped
54
Reputation
108
Reaction score
8
Trophy points
1,298
Location
China
Activity points
3,001
You should design a digital filter to remove ΣΔ noise rather than loop filter.
This technology is named noise shaping.
 

hmsheng

Full Member level 4
Joined
Dec 17, 2003
Messages
219
Helped
26
Reputation
52
Reaction score
10
Trophy points
1,298
Location
China
Activity points
1,556
Mash1-1-1 ΣΔ modulator itself has noise shaping function.
 

rfsystem

Advanced Member level 3
Joined
Feb 25, 2002
Messages
914
Helped
148
Reputation
292
Reaction score
38
Trophy points
1,308
Location
Germany
Activity points
9,550
Please check via simulation the delay impact of the VDD in terms of ps/V. Depending on the divider and the PFD circuit a phase modulation via supply noise is possible. If you then simulate with relaistic supply inductance/impedance you will get the possible source of the phase modulation. If the sigma-delta runs on the same supply it could easy ruin the performance.
 

    hmsheng

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top