weiyangchee
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Hi, I am now doing my final year project regarding FPGA , ISE and MATLAB, and the time is very rush and limited for me. I am now using FPGA Xilinx Spartan 3A evaluation kit. My main objectives is to use MATLAB SIMULINK to constrcut a block diagram and using Xilinx system generator to generate HDL code. After that load the program into the evaluation kit to perform output. Due to the problem that i am new in this field and XILINX, i would like to ask anyone can give me some idea in order to solve this problem. Thank you...