FPGA Power On Reset Circuit Actel AX2000

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It's an FPGA, pick a pin and use it as the reset. The reset is just another input pin and an internal net. Now how you design your reset scheme is another thread altogether.
 
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ads-ee said:
It's an FPGA, pick a pin and use it as the reset. The reset is just another input pin and an internal net. Now how you design your reset scheme is another thread altogether.
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i am newbie, only part of my job is hardware not embedded design, and also this is my first FPGA hardware design and i wanted to be sure.

Just pulling an I/O to high or low is enough? This is very interesting for me as a MCU circuit designer hahaha.

Thanks mate.
 

Depending on the internal function of the reset signal, you'll usually want a reset synchronizer that releases the reset synchronously to the design clock. Otherwise the reset effect may have unpredictable results.
 
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Hi,

Basically in FPGA there wont be any dedicated RESET pin. You can use any pin as reset but make sure at power on you need to give a reset pulse. You can connect this pin to any of your controller , if you have in your board. Better discus with your firmware team, how do they want this reset.


Amit
 
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