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fpga missing in jtag chain

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thepiper

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hi, i have developed a spartan ii board, and i have a problem configuring it. when impact tries to detect the devices on the jtag chain, which contains a prom and the fpga, the fpga is missing, and ofcourse all programming commands to the prom fail (idcode problem), what could cause this problem?
 

Try to slow down your JTAG clock, you may have noise problem in your JTAG chain, this is a very common problem causing the failure of JTAG interface.

The second thing to look is to see if the pull-ups and pull-downs for the JTAG signals are connected correctly.

Xilinx used to have these recommendation for their CPLDs that maybe a good starting point for problem solving for you:


• Make sure VCC is within the rated value: 5V ±5% for XC9500/XL and 3.3V ±10% for XC9500/XL.
• Provide both 0.1 and 0.01 mF capacitors at every VCC point ofthe chip, and attached directly to the nearest ground.
• Use the latest Xilinx download cables. This would be a ParallelCable with serial numbers greater than 5000 or any X-Checker cable.
• Consider including buffers on TCK and TMS interleaved at various points on your JTAG circuitry to account for unknown device impedance.
• Always be certain to use the latest version of the Xilinx JTAGProgrammer Software.
• Put the rest of the JTAG chain into HIGHZ when programming a troublesome part.
• If free running clocks are delivered into the ISP CPLD, it may be necessary to disconnect or disable their entry into the CPLD while programming.
• If 9500/XL is last in a JTAG chain, attach the download cables red VCC lead to the 9500/XL VCCIO.
Best regards,
/Farhad Abdolian
 

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