ttse7
Junior Member level 2
I have got a altera stratix II dsp board and built a nios softcore cpu inside. I try to drive the fpga using a clock from a external hardware. My problem is the clock form external hardware cannot drive the PLL inside the fpga.
When I monitor the clock to be input to fpga, the duty cycle is varied but meaured frequency is still 66MHz. Now, nios sometimes fails to work due to the external clock.
Experts, can you help?
I can use the clock to drive the nios by using fpga built-in clock without any problem. My project needs fpga to work with this external hardware. How to incorporate two hardware with two different clocks?
When I monitor the clock to be input to fpga, the duty cycle is varied but meaured frequency is still 66MHz. Now, nios sometimes fails to work due to the external clock.
Experts, can you help?
I can use the clock to drive the nios by using fpga built-in clock without any problem. My project needs fpga to work with this external hardware. How to incorporate two hardware with two different clocks?