FPGA based Modulation and Demodulation

[upendra prasad]

hello friends...
please guide me how to go about this project "fpga based mod/demod".
i'll be using a spartan 3 fpga kit. and my modulation technique will be 'binary amplitude shift keying'.
what i intend in doing is ... i have two kits ...in one i'll be giving my message signal as input(now that message will be voice or text or something)
that message will be modulated after it passes from one kit and that modulated signal will be input to another kit which will demodulate it and give me the output.
i m new to vhdl and i m trying to learn it.

 

[sandeep_swamy]

if your going to write a verilog / vhdl its very long and difficult process , so i mean if you do it in sysgen it will be better and easy also many blocks which is available over there.

 

[Port Map]

It will be so better to start with simulation.
second ctep can be cosimulation using sysgen or simulation HDL code with simulators like ModelSim or ISIM(xilinx own simulator).
and final step should be HW tests.

start your simulation in MATLAB and in this phase you will need to design the block diagram of Transmitter and receiver.
and this work will lets you in correct direction.

after that you should convert your design to HW. this can be happened by using the sysgen(system generator) or by converting from MATLAB blocks to HDL codes.
dont forget to simulate HDL codes after converting.