TonyLS
Member level 3
- Joined
- Jan 21, 2009
- Messages
- 58
- Helped
- 2
- Reputation
- 4
- Reaction score
- 2
- Trophy points
- 1,288
- Location
- Boston, MA
- Activity points
- 1,760
This is the first time through Formality with this design and I'm seeing a very long run time. The job hasn't finished yet. The previous design is 2.5 times larger than this design. The previous design takes 15hours, this design is going past 20 hours. From the log-file entries below it has a lot more to go.
The job is on a 64bit machine using 64bit software. I'm allocating 60G of mem, the job is taking under 3G. The CPU is 99% on this job.
Any ideas on what could be taking this job so long?
another question. Does the SVF file include all of the set_case_analysis that was done during the synthesis that generated the netlist and svf for formality? I'm not constraining any input ports in formality to match the set_case_analysis in synthesis. This wasn't done in the previous design which yielded acceptable results.
any help is appreciated
Status: Building verification models...
Status: Processing Guide Commands...
.............................. 680/20701 (3%) 06/6/12 18:08 2717MB/4662.24sec
.............................. 695/20701 (3%) 06/6/12 19:19 2717MB/8933.75sec
.............................. 710/20701 (3%) 06/6/12 20:30 2717MB/13214.22sec
.............................. 725/20701 (3%) 06/6/12 21:42 2717MB/17515.92sec
.............................. 740/20701 (3%) 06/6/12 22:54 2717MB/21843.49sec
.............................. 755/20701 (3%) 06/7/12 00:06 2717MB/26151.96sec
.............................. 770/20701 (3%) 06/7/12 01:19 2717MB/30491.25sec
.............................. 785/20701 (3%) 06/7/12 02:30 2717MB/34805.47sec
.............................. 800/20701 (3%) 06/7/12 03:42 2717MB/39080.02sec
.............................. 815/20701 (3%) 06/7/12 04:55 2717MB/43471.76sec
.............................. 830/20701 (4%) 06/7/12 06:06 2717MB/47757.75sec
.............................. 845/20701 (4%) 06/7/12 07:18 2717MB/52039.38sec
.............................. 860/20701 (4%) 06/7/12 08:29 2717MB/56321.48sec
.............................. 875/20701 (4%) 06/7/12 09:41 2717MB/60603.81sec
The job is on a 64bit machine using 64bit software. I'm allocating 60G of mem, the job is taking under 3G. The CPU is 99% on this job.
Any ideas on what could be taking this job so long?
another question. Does the SVF file include all of the set_case_analysis that was done during the synthesis that generated the netlist and svf for formality? I'm not constraining any input ports in formality to match the set_case_analysis in synthesis. This wasn't done in the previous design which yielded acceptable results.
any help is appreciated
Status: Building verification models...
Status: Processing Guide Commands...
.............................. 680/20701 (3%) 06/6/12 18:08 2717MB/4662.24sec
.............................. 695/20701 (3%) 06/6/12 19:19 2717MB/8933.75sec
.............................. 710/20701 (3%) 06/6/12 20:30 2717MB/13214.22sec
.............................. 725/20701 (3%) 06/6/12 21:42 2717MB/17515.92sec
.............................. 740/20701 (3%) 06/6/12 22:54 2717MB/21843.49sec
.............................. 755/20701 (3%) 06/7/12 00:06 2717MB/26151.96sec
.............................. 770/20701 (3%) 06/7/12 01:19 2717MB/30491.25sec
.............................. 785/20701 (3%) 06/7/12 02:30 2717MB/34805.47sec
.............................. 800/20701 (3%) 06/7/12 03:42 2717MB/39080.02sec
.............................. 815/20701 (3%) 06/7/12 04:55 2717MB/43471.76sec
.............................. 830/20701 (4%) 06/7/12 06:06 2717MB/47757.75sec
.............................. 845/20701 (4%) 06/7/12 07:18 2717MB/52039.38sec
.............................. 860/20701 (4%) 06/7/12 08:29 2717MB/56321.48sec
.............................. 875/20701 (4%) 06/7/12 09:41 2717MB/60603.81sec