Folded cascode sabilization amplifier

[Cesar92]

poles and zeros in folded cascode

Hello,
I'm desiging a FCDA for a 60dB gain, high output swing.
but, my load capacitor is variable from 20fF to 100fF max. I have a phase margin <45° can someone help me please?
look at the attached file.

 

[wael_wael]

ur OPAMP has very small load, any way u have to know what is he poles and zeros of ur system for folded cascode with NMOS differential input u can refer to razafi book.
any way the way of getting high phase margin and settling time it can be by increase the current of the cascode, to get haigh gain increase the current of the differenial input.
to reduce the unity gain frequency u can reduce the size of the differential input, same to increase it u can increase the size of differential input but u have to keep the input capacitance genrated by input transistors low(Cgs)
it is easy to be designed but i am not sure if the first stage can generate 60dB with requierd load and unity gain frequency
regards