Floating point FPGA...

[dineshrayar]

Is it possible to design a Floating Point Operation in VHDL or Verilog...?

and is it possible to inpliment Floating point design in FPGA (any manufacturar)...?

 

[FvM]

It is basically possible with devices of any vendor. Cause synthesisable float arithmetic isn't built-in to the HDL compilers, you need respective design components. They are provided by the FPGA manufacturers usually, e. g. Altera Quartus has floating point Megafunctions. You can also use arithmetic components or FPUs from third parties. Opencores.org has some designs.

Generally, float arithmetic has a large resource requirement. Thus the design structure should be well considered.

 

[standardon]

Floating point unit is a special unit of cpu and it is also designed in verilog or vhdl by designer.

 

[echo47]

Someday 'real' type will be supported in synthesis, but today it only works in simulators. As FVM suggested, you can instantiate floating-point modules/cores (probably included with your synthesis tools) into your HDL. Remember that they are instantiated modules that you must connect into your design. For example, here's the Xilinx offering:
**broken link removed**

 

[swapnil_vlsi]

It is possible with Virtex FPGA

 

[eziggurat]

That would depend on the precision and wordlength.

I just type in the internet "floating point FPGA precision virtex-E" and found this
http://www.eonic.co.kr/data/datasheet/transtech/FPGA/qx_dsp001_fp.pdf

I believe the Xilinx floating point library was based on the Quixilica core.