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floating point algorithm on FPGA

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J_expoler1

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How I can disign ALU 32Bit or 16Bit floating point algorithm on FPGA
 

Check attached VHDL floating-point library.


Ace-X.
 

Anyone has the IEEE floating point spec?


ASIC
 

you can read IEEE754 paper,
just you will understand.
 

synthesis

the vhdl code for the fpu, does work with synthesis ?
 

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