floating NSUB error in the layout DRC

[Junus2012]

Dear all

I am using NMOS transistors. when I do the DRC I got a message of "floating NSUNB" while as I think i should not receive like this message if the nmos has PSUB ??

thank you

 

[erikl]

"Forgotten" NWELL somewhere in your layout?

 

[Junus2012]

Hello Erikl

I solved the problem by putting NDIFF (diffusion + N implant)

any way I would also ask you, what is the difference between putting NWELL with contact and NDIFF and the NSUB, for me it seem all the same

"Forgotten" NWELL somewhere in your layout?

 

[erikl]

... what is the difference between putting NWELL with contact and NDIFF and the NSUB, for me it seem all the same

Again pls. review the picture from this post.

Probably NWELL & NSUB are the same: a (relatively) deep (and - by this - light = n- ) nwell diffusion, in the a.m. picture called 'LVNW' (low voltage n-well) in magenta color.

The problem is that the designations are fab-specific.

What you call "N implant" probably is - in the a.m. picture - the flat-lying N+ contact implant (light magenta colored), which is always necessary for each NWELL and close to each PMOS source.