Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Fixing Setup & Hold Violations

Status
Not open for further replies.

carrot

Full Member level 3
Joined
Feb 23, 2004
Messages
184
Helped
9
Reputation
18
Reaction score
4
Trophy points
1,298
Location
Bangalore, India
Activity points
1,532
hold time violation

Hi,

How to fix Timing Violations(Setup & Hold time Violations)?
What are all the things that has to be taken care while fixing it?
 

barkha

Advanced Member level 4
Joined
Aug 8, 2005
Messages
114
Helped
21
Reputation
42
Reaction score
10
Trophy points
1,298
Location
India
Activity points
2,576
setup time violation

Setup Time: the amount of time the
synchronous input (D) must be stable
before the active edge of the clock
Hold Time: the amount of time the
synchronous input (D) must be stable
after the active edge of the clock
If either is violated correct operation of the
FF is not guaranteed Metastability can result.

Below links are useful
**broken link removed**
http://www.vlsibank.com/sessionspage.asp?titl_id=6822
http://www.syncad.com/pdf-docs/paper_cc_timing_everything_2003.pdf
 
  • Like
Reactions: vnnavy

    vnnavy

    Points: 2
    Helpful Answer Positive Rating

satyakumar

Full Member level 3
Joined
May 18, 2006
Messages
186
Helped
20
Reputation
40
Reaction score
11
Trophy points
1,298
Location
Bangalore
Activity points
2,411
setup and hold time violation

Hi,
Setup time fixing:
1) reducing combinational logic delay by minimising number of logic levels
2) splitting the combinational logic
3) Implimenting Pipelining
4) Using double syncronizer using flipflops
Hold time fixing:
1) Can be fixed by adding delays on input ports
2) adjusting clock speed

Generally hold time is not in the user control

Thanks
 

raju3295

Full Member level 4
Joined
Jan 4, 2007
Messages
206
Helped
17
Reputation
34
Reaction score
4
Trophy points
1,298
Activity points
2,376
set up and hold time violations

hi
if u find the violations after the tape out
then u can find a work around solution by playing with working temp
 

xstal

Full Member level 2
Joined
Oct 12, 2006
Messages
138
Helped
20
Reputation
40
Reaction score
0
Trophy points
1,296
Location
USA
Activity points
2,197
hold time violations

During the initial iterations only set up violations are fixed whereas hold violations are fixed only after the actual physical place and route info is available. Set up and hold violations are mutually exclusive. set up violations can be fixed by reducing the combo delay. Hold time violations are fixed by increasing the combo delay or by inserting buffers such that it does not cause the setup violations. Increasing or decreasing delays by upsizing or downsizing the cells ripples back into the design and the whole design is to be taken into consideration for carrying out the STA again.
Cheers:)
 

    V

    Points: 2
    Helpful Answer Positive Rating

shelby

Full Member level 2
Joined
Jan 4, 2007
Messages
124
Helped
38
Reputation
74
Reaction score
18
Trophy points
1,298
Activity points
2,045
fixing setup and hold violations

satyakumar said:
Hold time fixing:

2) adjusting clock speed

Generally hold time is not in the user control

Hold time is independant of clock speed which makes it a potential design killer. No matter how much you slow your clock you may still have hold violations. They are easily fixed by inserting buffers or downsizing cells (but making sure not to create any setup violations). Also a good idea to add some extra hold margin.
 

satyakumar

Full Member level 3
Joined
May 18, 2006
Messages
186
Helped
20
Reputation
40
Reaction score
11
Trophy points
1,298
Location
Bangalore
Activity points
2,411
setup and hold violations

Hi,
By adjusting Clock speed u can vary setup window margin, and after one can insert delays are buffers to fix hold violation. By adding delays to fix hold time doesn't solve problem, setup and hold time are interdependent.

There is no fix for hold vioaltion in RTL rather then adding delays.
 

raju3295

Full Member level 4
Joined
Jan 4, 2007
Messages
206
Helped
17
Reputation
34
Reaction score
4
Trophy points
1,298
Activity points
2,376
hold time violation example

hi carrot
hold and set up violations are mutually exclusive and vilations can be adjusted with the combi delays and these delays will be more if u increase working temp and will be less if u decrese temp ..just this is my thoguht please suggest me whether its possible in real time or not and tell me if there is any problem with playing temp
 

satyakumar

Full Member level 3
Joined
May 18, 2006
Messages
186
Helped
20
Reputation
40
Reaction score
11
Trophy points
1,298
Location
Bangalore
Activity points
2,411
hold violations

But in real time operation, we can't fix temp. working temp is indepedent
 

qingliliu

Junior Member level 1
Joined
Jan 15, 2007
Messages
18
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Activity points
1,349
setup and hold time violations

when fix setup/hold:
please analysis whether the violation is caused by clock skew, if yes ,adjust it.
 

sumit_techkgp

Full Member level 2
Joined
Apr 1, 2007
Messages
134
Helped
8
Reputation
16
Reaction score
5
Trophy points
1,298
Activity points
1,866
setup hold time violation

Insert high and low drive strengths in failing paths
 

atuo

Member level 3
Joined
Feb 19, 2004
Messages
59
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
493
how to fix hold violations

carrot said:
Hi,

How to fix Timing Violations(Setup & Hold time Violations)?
What are all the things that has to be taken care while fixing it?


Hi ,

Setup violation can be fix by insert registers in worst path.
Holdup violation can be fix by insert buffer.

Thanks.
 

pradeep2323

Junior Member level 3
Joined
Nov 2, 2006
Messages
27
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Activity points
1,487
fix hold time violation

whhen setup time time violates your design works with lesser frequency but when you hold time violates your design doesnt work at all.thats why hold time fixing is critical.
You can fix setup time time by adding some dalay by adding register or you can adjust the verilog coding.
if else loops are replaced with case statements.
 

Clunixchit

Member level 1
Joined
Jul 15, 2007
Messages
35
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,488
how to fix setup time violation

atuo said:
Holdup violation can be fix by insert buffer.

Thanks.

Can one identify those cells either :
* inserted by insert_buffer command, or
* auto buffer insertion by DC during optimizations ?

Perhaps there is a special attribute on those cells ?
 

bobjee

Newbie level 5
Joined
Jun 2, 2009
Messages
10
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,337
In one of my projects

I have got timing violations for a same register at different times. I wanted to know if though the timing violations are at different times, fixing one would fix the other violation at different time also right?
 

prpatil03

Newbie level 1
Joined
Oct 28, 2010
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,285
In one of my projects

I have got timing violations for a same register at different times. I wanted to know if though the timing violations are at different times, fixing one would fix the other violation at different time also right?

Hi Carrot,
After manufacturing of chip, if you are getting hold violation. then it will not work. But still if you want to make it work, go to lab, increase the lab temp depending on your hold time violation, since hold violation is inversely proportional you can make it work.
 

chiragh.wild

Newbie level 4
Joined
Feb 12, 2011
Messages
6
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,312
Hi , can anyone explain Negative Values in Setup and Hold Checks?
 

jeevan.life

Full Member level 5
Joined
Jun 26, 2010
Messages
241
Helped
83
Reputation
164
Reaction score
77
Trophy points
1,308
Location
Bangalore
Activity points
2,444
Re: hold time violation example

hi carrot
hold and set up violations are mutually exclusive and vilations can be adjusted with the combi delays and these delays will be more if u increase working temp and will be less if u decrese temp ..just this is my thoguht please suggest me whether its possible in real time or not and tell me if there is any problem with playing temp

How can you play with temp. after taping out?? its not in your control...can you please clarify your ans?

During STA we can take temp. to consideration but how after tape out?..

---------- Post added at 11:24 ---------- Previous post was at 11:21 ----------

Hi Carrot,
After manufacturing of chip, if you are getting hold violation. then it will not work. But still if you want to make it work, go to lab, increase the lab temp depending on your hold time violation, since hold violation is inversely proportional you can make it work.

I dont think chips are made to work in labs only either.... so I would say leave out temp. and playing with temp. to fix any violations....best is to increase/reduce datapath delay or to introduce skew to clock path...
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top