Fixed frequency offset in designed PLL Circuit

[Khashia]

I am using ADF4107 IC for PLL Frequency Synthesizer in 4-5 GHz range. PFD Frequency is 100kHz and Reference Crystal is 10 MHz.
The PLL is locking. and the R-divider and N--divider values are appearing as expected but there is a fixed frequency offset appearing in the output , what could be the possible reason ,it is generating all frequencies till 5 GHz range but all with the same frequency offset for example instead of 5 GHz exactly it would generate 4.99999877 (something) GHz. What might be the possible cause?

 

[BigBoss]

It's normal and it may be readout error of your SA.If you decrease resolution bandwidth and sweep time and span of your SA, you will see exact value ..

 

[pstuckey]

It's likely that the 10 MHz reference for the PLL is slightly off the 10 MHz reference in the SA. For best accuracy, try to use the same reference for both, either feed the PLL the ref.out of the SA, or feed the SA ref.in with the PLL 10 MHz.

 

[kripacharya]

based on your numbers, this error is less than 1 ppm. are all your frequencies and instruments calibrated correctly for accuracy << 1ppm ?

 

[Khashia]

thank you so much for all the replies, regarding frequency offset , i'm not sure if that is issue cause both R-divider and N-divider are giving the expected frequency count, could that still be an issue?

Earlier with the external ref freq source I was getting the exact frequency however spurious contents were high. Now when I switched to on-board crystal source spurious contents are removed however there is a fixed frequency offset?

 

[kripacharya]

Earlier with the external ref freq source I was getting the exact frequency however spurious contents were high. Now when I switched to on-board crystal source spurious contents are removed however there is a fixed frequency offset?

sounds like your crystal is not exactly same as the external freq ref used earlier. Why not try see if these two frequencies are exactly the same within < 1ppm ? I suspect your crystal might need some trimming, thats all.

 

[Khashia]

Right and what could be the reason of spurious components appearing with external frequency and not with crystal oscillator?

 

[kripacharya]

Right and what could be the reason of spurious components appearing with external frequency and not with crystal oscillator?

A guess would depend on what sort of spurious you are getting. But are you using a DDS core in your external freq ref ?
And have you managed to compare the two frequencies ?

 

[Khashia]

The spurs were reference spurs at multiples of PFD frequency. and external reference is external frequency generator.

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In my circuit where i have to feed reference frequency input impedance = 100k ohm and input capacitance = 10 pF.
whereas crystal output load impedance is 18 kohm -22 kohm and output load capacitance = 4.5 pF -5.5 pF. How to adjust these two so that there are no crystal overloading effects and reference Input has enough peak-peak value.

 

[Khashia]

Nobody knows the answer?

 

[kripacharya]

The spurs were reference spurs at multiples of PFD frequency. and external reference is external frequency generator.

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In my circuit where i have to feed reference frequency input impedance = 100k ohm and input capacitance = 10 pF.
whereas crystal output load impedance is 18 kohm -22 kohm and output load capacitance = 4.5 pF -5.5 pF. How to adjust these two so that there are no crystal overloading effects and reference Input has enough peak-peak value.

you are connecting a crystal directly onto the ref-in input ? we assumed you were using a crystal derived ref input.
interesting

The analog devices website has lots of faq's which might answer some of your troubles

 

[Khashia]

No i am not connecting a crystal ,I am using Crystal oscillator circuit, and that is Rakon 225A-5 10 MHz. The output load specs I mentioned are from the oscillator's data sheet.
Please tell me with that specs could I use that oscillator directly with the reference pin or have some sort of output circuitry? I suspect I would need to have some lumped element matching.

 

[biff44]

If there is a "fixed frequency offset" in your PLL, then one of the following is happening:
1) the pll is not actually phase locked
2) you are programming the bits incorrectly
3) you are saying there is a "fixed offset" based on a poor (inaccurate) frequency counter reading

You should figure out which it is.

 

[Khashia]

ok, i'll check with that despite he fact that r and n divider are giving correct pulse count output, digital lock detect is indicating lock, and the circuit locked with the same filter components to the exact frequency with the external frequency source.

But could you please tell me that a Rakon TXO225A-5 whose output recommended load is 4-5 pF ,18-22 kohm is fit; if connected directly to REFIN pin which has input parameters 100kohm and 10pF capacitance????

If not what could be the possible adjustment??please tell that....

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In the recommended circuit board layout Analog devices suggests two separate 1nF capacitors in series(thus 2 nF) with the oscillator output which I couldn't justify at 4-5 GHz frequencies .(the crystal oscillator used is the same).

 

[Khashia]

Somebody please help me,I checked with analog devices website, but its just mentioned that they prefer AC coupling rather than DC coupling for Oscillator sources, but even in that case they would've recommended 100pF capacitor in series with oscillator output in board layout not 2nF (for the required frequencies).

Kirpacharya, a guess for reference spurs reason needed also.

 

[kripacharya]

Kirpacharya, a guess for reference spurs reason needed also.

the Analog Devices site also has a writeup on sources/ causes for spurs. Have a look there first. Can't really tell you more than that.
Also - you never did mention what sort of external siggen you were using ? DDS based i presume ?

 

[tony_lth]

Some ADF IC has special requirement of the A and B, say A must less than etc., I met such an issue. So pls contact with ADF support.

 

[Khashia]

Some ADF IC has special requirement of the A and B, say A must less than etc., I met such an issue. So pls contact with ADF support.

I am talking about Crystal mismatch;
and are you talking about RFinA and RFinB,
there is not less or greater relation between these two,In datasheet its mentioned that RFinB be decoupled to ground and RFinA is the feedback from the output.