firefoxPL
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phase accumaltor
Hello, I would like to present a software I've written for calculating parameters of phase accumulator in order to create a clock with given frequency. The idea of using phase accumulator for this task is taken from an Analog Devices article about Direct Digital Synthesis - the article can be found here.
The whole idea of phase accumulator is very simple, you just add a fixed value to a register (which width is one of the needed parameter) and a clock signal with 50/50 duty cycle is generated with the MSB of the accumulator. And realization of this idea in FPGA takes very few resources so it is perfect for generating precise clock signals from given frequency (usualy from some oscillator on board).
As an attachment I've put the software (you can also find it on my web page) not only for calculating all needed parameters but also for generating a ready to use VHDL code of customized phase accumulator.
If there are any questions about the idea or the program itself please ask here in this topic.
Hello, I would like to present a software I've written for calculating parameters of phase accumulator in order to create a clock with given frequency. The idea of using phase accumulator for this task is taken from an Analog Devices article about Direct Digital Synthesis - the article can be found here.
The whole idea of phase accumulator is very simple, you just add a fixed value to a register (which width is one of the needed parameter) and a clock signal with 50/50 duty cycle is generated with the MSB of the accumulator. And realization of this idea in FPGA takes very few resources so it is perfect for generating precise clock signals from given frequency (usualy from some oscillator on board).
As an attachment I've put the software (you can also find it on my web page) not only for calculating all needed parameters but also for generating a ready to use VHDL code of customized phase accumulator.
If there are any questions about the idea or the program itself please ask here in this topic.