Fix point Arithmetic

[sheikh]

Hello Dear
I want to use some arithmetic operations such as (+,_,*) in my design. The design is fix point. Could you please tell me, If I use (+,_,*) symbols in my vhdl code, is it synthesize correctly or not? Or I need to design the units ( n_bit full adder, for instance) then write the code structurally. ( consider it that, I don't start to coding, because I'm not sure about the true way)
Regards
Mostafa

 

[shaiko]

+ - * are synthesizable - the performance between one device to another will vary because of the actual implementation of the synthesis tool , different architecture and available "hardened" logic components on the silicon die...

Division however, is synthesizable for constants and 2^n numbers only...you'll have to built your own logic if you want to do division

 

[sheikh]

Thanks Dear shaiko
Could you please tell me which one is better for a design?
1_ using structural coding. 2_ using symbols ( I mean, using "+", instead of an adder unit)
Thanks in advance
Mostafa

 

[shaiko]

Unless you're required to use specific logic components that may be inaccessible with the regular arithmetical operators - I see no point to use structural coding.

- - - Updated - - -

Even more, VHDL gives you a great tool (functions) to implement any pure combinatorial logic without resulting to structural coding.

 

[sheikh]

Thanks a lot

 

[TrickyDicky]

no need to write your own divider. both altera and xilinx provide divider ip cores.

also have a look at the new fixed point vhdl packages. for 93 compatible versions see WWW.vhdl.org/fphdl

 

[shaiko]

TrickyDicky,
using IP's means that the user will have to result to structural coding...