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fitting a larg design to more than one IC

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tiger2000

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Hi everyone!
Can anyone help me how I can fit a larg design to multiple Xilinx device.
Thanks in advance.
 

you can use $ynplicity's Certify to partition your design into multiple FPGAs for fast prototyping.

eman
 

H!

Tell about current release of Certify 6.0.1. or 6.0.2?

FoxB
 

How are IO pins assigned with a partitioned system across a couple FPGAs?

- Jayson
 

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