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First attempt at USB differential pair routing on a 2 layer board. Acceptable or not?

TnF

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I am making a custom keyboard with an integrated usb hub and 2 input/upstream usb type-c ports (selectable).

So my first prototype board had some issues with usb connectivity due to me not knowing anything about differential pair routing, matching/coupling and impedance control. I've learnt about it now and using my pcb specs (1.6mm thick, 1.52mm fr-4, 1oz cooper) and a target of 90ohm differential impedance, i calculated a value of about 0.93mm track width with 5mil spacing. Then i tried routing the differential pairs as best as i can, and after playing with component placement and much manual routing i was able to route the whole board.

This is not the final routing but i made many changes to the pcb and schematic and i wanted to know beforehand if it is possible to route it without:
a) Changing the board size
b) Going with a 4-layer board

For (a) i tried to keep the same size due to the reason being that i want it to be as compact as possible (also this needs less changes to be made after like the case and plate) and solderable by the tools i have, and for (b) the reason is that 4-layer is twice as expensive, and jlcpcb can't make it due to being over 300mm (mine being over 350mm in length of which i cannot change). I know pcb-way can make it but i don't want to spend additional money for a prototype i will be probably the only one using, and i was really happy with jlcpcb service.

So lets start:

PtNdvv4.png

Here is the overall board without any overlays. You can see i have a total of 7 differential pairs, some of which span more than 250mm in length.

3Pf8MvE.png

fWE0pG7.png

Here is where all the pairs end up. On the left we have a USB switch controller which connects a 4-port USB hub controller on the right. The job of the USB switch is to select either the left or right USB-C port which interfaces to the host device and connect it to the hub.
First question: Note that i had to fanout the pairs with thinner traces (0.35mm, 5mil spacing). Is that an issue or not? Is there is a better way considering the 2-layer board limitations?

7Ip1lBe.png

Also the usb switch is connected to the usb hub with 0.35mm traces only. Still gapped to the min possible by jlcpcb (5mils). They are about 14mm in length and i had do these flip shenanigans. I've tried changing ports to minimise flipping but it was inevitable i had to flip some signals. Would this be problematic?

fxex1JT.png

Here we can see the track thickness transition from one of the fanouts. Is that as bad as it looks or no? (ignore the non differential pair tracks as i did 0 cleanup on this board)

5ODDhup.png

Here is one long pair. I did length matching to all, but i generally had to do it where the traces are the 0.93mm thick ones. This makes a big kink where it leaves a small section of the track uncoupled with the other one. Would that cause an issue, and can be improved upon? (I tried to make the kink gap as small as possible)

xDjI29J.png

Here's a close-up of my shenanigans with the usb-c port. The other one is better because it didn't require a signal flip. Can i do better?

G77hcq4.png

Here is one other type of shenanigan i had to make (i believe is the only one like this). Will it work or not?:p


Finally the last thing i want to ask is regarding the copper pours. In my first board i had a ground fill plane on the bottom layer, and a VCC fill plane on the top layer. Reasoning is that most components are on the bottom and are fairly low power so i used it for ground distribution, and on the top layer for power distribution to the over 100 rgb leds i have daisy chained. Is this ok to do for differential pair shielding or should both be ground pours instead?
My theory is that EMI doesn't care at what DC level a plane is at, and since both are at constant values, the electromagnetic field between them while it will not be zero it will be constant and non-changing to affect the signals. I may be mistaken though.

ps: All signals are to support USB 2.0 hi-speed 480mbps.

ps 2: Instead of routing i believe it is way more easier to have these pairs (at least the long ones) to be connected via a bodge twisted wire instead. Is this an acceptable method?
 

barry

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1. You need a ground plane, not a copper pour. There are too many traces on the bottom layer to get any kind of reasonable plane using a pour.

2. What’s with that kink? That might cause more trouble than the slight length mismatch.
 

KlausST

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Hi,

1. You need a ground plane, not a copper pour.
I totally agree.

Here, with high frequency signals an expected constant line impedance it is urgent.

Mind: every split in the Ground plane that is crossed with your signal traces causes a jump in impedance and thus will cause reflections.

Don't go to that close to the edge of the PCB, because the GND plane needs a bit to extend at the sides of the traces to work properly. Else expect impedance mismatch.

Klaus
 

FvM

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Although it's not the straightforward way, I made a SATA interconnect board on a two layer PCB a longer time ago. In so far I'd say it's feasible. It's using differential coplanar strips with ground to save PCB space. Via fences, all unused area flooded and trace crossings right angled. Obviously very time consuming layout work, likely to fail EMI requirements, not suggested for starters.
 

TnF

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1. You need a ground plane, not a copper pour. There are too many traces on the bottom layer to get any kind of reasonable plane using a pour.

2. What’s with that kink? That might cause more trouble than the slight length mismatch.
Hi,


I totally agree.

Here, with high frequency signals an expected constant line impedance it is urgent.

Mind: every split in the Ground plane that is crossed with your signal traces causes a jump in impedance and thus will cause reflections.

Don't go to that close to the edge of the PCB, because the GND plane needs a bit to extend at the sides of the traces to work properly. Else expect impedance mismatch.

Klaus

Well....then. So technically if this was a 4-layer board and the 2 inner layers were ground layers, and assuming track width and gap was correct, my routing would work? Except the one close to the edge? Seems like a waste of a 4-layer board to me.
As for (2), i thought length matching was more important than having a section of uncoupled length.



Although it's not the straightforward way, I made a SATA interconnect board on a two layer PCB a longer time ago. In so far I'd say it's feasible. It's using differential coplanar strips with ground to save PCB space. Via fences, all unused area flooded and trace crossings right angled. Obviously very time consuming layout work, likely to fail EMI requirements, not suggested for starters.
This sounds a lot of work to do but at least i'll be learning. It's difficult for me to imagine exactly how you did it, i understood the coplanar strips and the right angle crossings, but not the fences part;



Should i just go with the external bodge twisted cables to connect the ports instead and call it a day? Or that would not work?
 

barry

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You have to understand WHY you’re doing something rather than just blindly following some “rules”. The reason you want the traces of a differential pair to be the same length is so that you get good common-mode rejection and precise edge transitions. Will a 0.1 inch difference cause a problem? Probably not. A 2 inch difference? Probably. But you need to think about your exact application.
 

TnF

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You have to understand WHY you’re doing something rather than just blindly following some “rules”. The reason you want the traces of a differential pair to be the same length is so that you get good common-mode rejection and precise edge transitions. Will a 0.1 inch difference cause a problem? Probably not. A 2 inch difference? Probably. But you need to think about your exact application.
Yeah sure i understand this. However i do not have the experience to tell which variables are more sensitive and/or more effective to the design.
 

barry

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Well, to be honest, I don't think that kink matters one way or the other. But I cannot overemphasize the necessity of a solid ground plane. Sure, you might be able to get away with a two-layer board, but isn't your sanity worth something, too? The time you will spend trying to make a less-than-optimum design work could be better spent doing, well, just about anything else.
 

thunderdantheman

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USB2 is somewhat forgiving although not with EMI. However, you have significant runs and I donÂ’t think it will be that forgiving. Unfortunately your diff pairs are not going to behave as intended. (Although, they will likely make excellent RF radiators ;) ) As stated, edge coupled diff pairs required a ground plane underneath the entire diff pair. FvM's method is one solution when this is not possible and used frequently in automotive electronics where every skerrick of cost saving is required with two layer boards being common. Although, you will probably need a decent field solver (e.g. si9000) to get reasonable results.

An alternative routing method is a groundless broadside differential pair. In this way the +ve and -ve signals are routed identically but on opposite layers e.g. the +ve signal is routed on the top layer and the –ve is routed directly below it on the bottom layer. In this way a virtual ground plane is formed midway in the dielectric (provided the signals are truly differential which USB 1.1 is not but let’s ignore that fact because hopefully you will successfully negotiate a USB2 link). This obviously restricts your routing but signal integrity and EMI usually take precedence and one routs accordingly.
You might be able to squeeze them up along the top edge of the board. The calculations are relatively straightforward for this type of transmission line with many simple tools on the web (warning: use a few to ensure consistency!) One can assume each trace is a single ended surface microstrip with a dielectric thickness half that of the actual board. One trick to reduce the track width is to move to a thinner PCB substrate.. Say 0.6mm or something. (approx. 20mil track with Er=4.8).

A plethora of information can be found hereÂ… https://www.polarinstruments.com/support/cits/cits_index.html AP147 is looks to be exactly what you need to read. You should be able to make this work with other free field solver tools unless of course you have access to si9000.
Also, check your hub chipÂ… they can often automatically or with a strapping option, do the Dn Dp crossover internally thus avoiding some of those nasty shenanigans. (In contrast, USB3 allows swapping of the diff signal polarities as per the standard).

Really and truly, unless you are intending on making significant qtys of these, save your time ($$$$$) and use a four layer board. Yep.. they cost a bit more, but not much... however, you spend a quarter of the time routing it, EMC is much easier to achieve and signal integrity is much easier to control. If youÂ’re only making a couple of boards itÂ’s your best bet.. EMC testing is in the order of $10kÂ… donÂ’t want to be doing it twice..

You certainly got one thing right though, “EMI doesn’t care…”
 

Kamskakah

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First attempt at USB differential pair routing on a 2 layer board Acceptable or not

Yes, I had planned to sketch it first, then I seen a video where someone was painting with burnt cyan or acrylic over the sketch as their first step.
 

marce

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Well....then. So technically if this was a 4-layer board and the 2 inner layers were ground layers, and assuming track width and gap was correct, my routing would work? Except the one close to the edge? Seems like a waste of a 4-layer board to me.
As for (2), i thought length matching was more important than having a section of uncoupled length.
Nope you are providing a RETURN path for all your signals, never a waste, always a benefit...
 

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