Find Zener breakdown tension?

[ArFa]

Hi, how are you?
Please help me to find the zener breakdown tension in this circuit so that NM(low) = NM(high);
NM means noise margin so that NM(low)=Vi(low) - Vo(low) and NM(high) = Vo(high) - Vi(high).
Vcc=15V; Vγ=0.65V; Vbe(sat) = 0.75V; Vce(sat) = 0.2V; Vd=0.75; hfe=40

http://imageshack.us/photo/my-images/814/circuit.png

Thanks

 

[BradtheRad]

This is a logic gate made from discrete components.

The purpose of diode_virtual and zener is to prevent the transistor bias from being turned on when it's not supposed to be. And turn it on when it is supposed to be.

You start by pretending wire #2 is only a plain wire going to the bias terminal.

Then you consider all combinations of input at A,B,C.

You calculate whether the voltage will become high enough to turn on the bias. If you don't want it to be turned on then you will have the clues to determine what should be the voltage threshold needed for the zener diode.

 

[ArFa]

but I have to find zener breakdown tension and I don't know how to find that...

 

[BradtheRad]

It would help to build the circuit. Or using a simulator may be sufficient.

Play with some values. Is Vy the bias threshold voltage (makes the transistor turn on)? Therefore observe what causes node 1 to be at a voltage that makes the transistor turn on or off. Discovering this is essential before you can figure out what zener breakdown voltage you need.

Try grounding different inputs A,B,C. Observe how it changes V at node 1.

I assume the noise margin consists of variations in input at A,B,C. Try adding noise as you pull down the voltage at inputs A,B,C. This could be 1/2 volt of ripple. Also add different amounts of resistance. Observe how the noise affects V at node 1.

The math is tedious. Seems to me the circuit existed before the math. See how the circuit works and it may help the equation gel.

 

[ArFa]

Thanks BradtheRad but I have to find that tension with equations and I need exactly that tension

 

[FvM]

The problem formulation makes clear, that only a simplified calculation is needed. No exact transistor or diode characteristics, just nominal didoe and transistor forward respectively saturation voltages. It's going like this:
- determine Vo(high) and Vo(low)
- because separate Vi(low) and Vi(high) voltages can't be determined in the simplified calculation, you would want to determine an optimal input threshold Vi(thr), exactly the mean of Vo(high) and Vo(low), that fulfills the noise margin requirement.
- placing this voltage level at the input, you can calculate which zener voltage will cause the output to switch exactly at this level

 

[erikl]

- placing this voltage level at the input, you can calculate which zener voltage will cause the output to switch exactly at this level

Exactly. With the OP's parameter values, the solution is

• Vi,switch = 7.6V
• VDz = 6,75V
• V(NM) = 7.4V

Pretty nice homework, isn't it?

 

[BradtheRad]

Gentlemen, I realize you're experts, but...

I didn't realize the idea was to do the OP's homework for him.

And simplified equations may get us through the homework assignment...

However I thought it would be more helpful to get the OP acquainted with real world details.

Because there's bound to be a 4.0 student in the class who goes home,

and breadboards with real components,

and checks voltage readings with a meter...

And he will come back and point out to the professor...

That if we build a real circuit as given in the OP...

The bias input will experience variations of a few tenths of a volt,
which are not covered by the simplified textbook equation,
and which cannot be regarded as noise,
and which are inherent in normal operation.

Because:

1.

Grounding one input causes a big V drop at node 1, but not necessarily to the spec we hear about. Could be one or two tenths of a volt below that, depending on where mA and fwd V cross on the real-world diode curve. As dictated by 15K resistance in the line.

And where do we find a diode curve with that fine resolution? I never saw one until I made my own.

Furthermore for each additional input you ground, it causes a further drop by maybe .1 V or so.

This is because those three diodes in parallel are really resistances in parallel (electrically speaking).

2.

The transistor bias starts admitting microamps at around .35 V. A few tenths of a volt below what we always hear as the simplified spec .65 V, or .6 or .7).

Therefore a real transistor will begin to turn on, and the output will change, before bias rises to 'simplified' spec V. (At least it will in the circuit of the OP.)

So...

Will these details change the final answer? Maybe by a few tenths of a volt. Not much to talk about.

But suppose the assignment had stated noise range as .3V? Isn't that at the same level as the details I listed under points 1 and 2? Do they matter then?

And what will the professor say to the 4.0 student who breadboarded a real circuit?

Will he say "You're that much ahead of your peers"?

Or will he say "We only need to use simplified equations"?

Or will he say "I built the circuit 20 years ago, and I simply threw in a 10V zener, and it worked fine"...


:wink:

 

[FvM]

I didn't realize the idea was to do the OP's homework for him.

You are right to question if we should do.

And simplified equations may get us through the homework assignment...
However I thought it would be more helpful to get the OP acquainted with real world details.

Apart from the exact exercise text, I think it's reasonable to use a simplified solution in this case. Personally, I thought "O.K. a 6.8V zener" at first look, and won't do further calculations. Technically spoken, DTL logic is legacy since 50 years.

 

[erikl]

... DTL logic is legacy since 50 years.

Right. Recently I got a box of about 30..35 years old FZ[HJKLY] LSL ICs (same tech.) -- which I probably will never use ;-) . Data sheets are still accessible: **broken link removed**