file handling in vhdl

[velu.plg]

my text file contain data in matrix format....
i.e) 1 2 3
4 5 6
7 8 9
how can i read this data and how can i write this data into another text file in same matrix format using file handling concept...

 

[TrickyDicky]

I suggest you google:
textio tutorial vhdl. Theres plenty out there.

 

[velu.plg]

I suggest you google:
textio tutorial vhdl. Theres plenty out there.

sir thanks for your reply...
i know only the basic of file handling in vhdl...
i can read the first colom easily(example:1 2 3) ...but how can i move the access type pointer to second colom for reading the second colom(4 5 6)...i need only the syntax or specific link regard my doubt....

 

[TrickyDicky]

the readline(file, line) procedure reads an entire line from a text file. You then use read(dest, line) to extract elements from that line.

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Or, to make our lives a little easier, post the code that doesnt work and ask some good questions.

 

[velu.plg]

thanks sir..

sir,this is my code.

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_textio.all;
use std.textio.all;

entity test1 is
end entity test1;

architecture beh of test1 is

file indata :text open read_mode is "D:\VLSI\vlsi project\AV00 _samplecode\draw\filehandling\indata.txt";
signal c:integer;

begin
process
variable buff : line;
variable a : integer;

begin
while not endfile(indata)
loop
readline(indata,buff);
read(buff,a);
c<=a;
wait for 100 ps;
end loop;
wait;
end process;
end beh;



input text file:

1 4 7
2 5 8
3 6 9

my output c= 1, 2, 3
but i can't get 4,5,6,7,8,9.
so, how can i move the pointer to next colom for reading remaing data ?

 

[FvM]

read(buff,a1,a2,a3);

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Multiple values with a single read() are probably not supported, instead repeat read(buff,a,good); in a loop while good is true.

 

[velu.plg]

thanks sir..

i try this but i get output c=4,5,6
in my code where i can put change...
and pls give reference link regards to read matrix format text file...
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_textio.all;
use std.textio.all;
entity test1 is
end entity test1;

architecture beh of test1 is
file indata :text open read_mode is "D:\VLSI\vlsi project\AV00 _samplecode\draw\filehandling\indata.txt";
signal c,d:integer;
begin
process
variable buff :line;
variable a : integer;
variable good : boolean;
begin
while not endfile(indata) loop
readline(indata,buff);
read(buff,a,good);
c<=a;
while good loop
read(buff,a,good);
c<=a;
exit;
end loop;

wait for 100 ps;
end loop;
wait;
end process;
end beh;

 

[TrickyDicky]

Signals only get assigned when it hits a wait statement, so it extracts all the values from the line before assigning the last value on each line as you have the wait statement after the loop.

 

[velu.plg]

thanks for your replay sir...
i try this code but problem is still occur...

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_textio.all;
use std.textio.all;

entity test1 is
end entity test1;

architecture beh of test1 is
file indata : text open read_mode is "D:\VLSI\vlsi project\AV00 _samplecode\draw\filehandling\indata.txt";
signal c,d : integer;
begin
process
variable buff : line;
variable a : integer;
variable good : boolean;
begin
while not endfile(indata)
loop
readline(indata,buff);
read(buff,a,good);
c <= a;
wait for 100 ps;
while good loop
read(buff,a,good);
c <= a;
wait for 100 ps;
end loop;
end loop;
wait;
end process;
end beh;

input text file
1 4 7
2 5 8
3 6 9

here i get output :
c=1 4 7 2 5 8 3 6 9(i.e row vice read)
expecting output:
c=1 2 3 4 5 6 7 8 9(but i want colom vice read)

pls give idea or give related reference link..

 

[TrickyDicky]

Then I suggest you reformat the text file.

 

[velu.plg]

sir , my question is i want to read the data by colom vice(read colom 1 then colom 2...)...
but my code read the data only in row vice...

 

[TrickyDicky]

THen what you need to do is have 3 loops.

Open file
Read each line.
Read the first value off each line
repeat to EOF
close file

open file
read each line
read the first value and discard
read the second value
repeat to EOF
close file

--and same again for 3rd value

Or, you could just make your life easier and re-orgnaise the data.

Or just read all the values into an array and re-sort it.

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There is no "Read in column" mode in VHDL. Textio is done on lines of text.
So its easier just to change the input data format.

 

[velu.plg]

ok sir...now i clearly undersood..