FIFO Depth Calculation in I2C bus

[dinesh.4126]

Hi,
Write Freq=27Mhz and 8 bit data width.
Read Freq=50KHZ and 8 bit data width.
and Depth=(27MHZ X 8)/(50KHZ X 8)=540
Will this is the right way of calculating depth.if not please let me know the right way..
I am using FIFO in I2C bus.

 

[lostinxlation]

With that much clock frequency difference, it will get full very quickly and once it becomes full, it acts like one entry fifo. Having more entries helps the performance to some extent, but no generic formula can be applied to calculate fifo depth from above condition alone, I guess.
if full signal is delayed by some cycles, then that's a different story and you need to have a certain amount of depth to make sure it doesn't get overrun..