FFT output data width

[karthi1412]

Hi everyone,
I am giving 8192 ADC(14 bit) samples to FFT(8192 points). ADC samples are in 2's complement format. What is the FFT output bit width which means real and imaginary bit width?? How to calculate this?? please anyone suggest me.

Thanks,
Karthi Periyasamy

 

[KlausST]

Hi,

What code software are you using?
I´d read it´s documentation...

I guess:
the input bit width is not 14 bit. I rather guess signed 16 bit or float.
So the ouput could be signed 16 bit, signed 32 bit or float.

Klaus

 

[FvM]

FFT involves scaling, respectively the output can have any data format and width set in the tool.

 

[karthi1412]

Hi,

What code software are you using?
I´d read it´s documentation...

I guess:
the input bit width is not 14 bit. I rather guess signed 16 bit or float.
So the ouput could be signed 16 bit, signed 32 bit or float.

Klaus

Hi,
yes, if we use processor, It will be 16 bit or 32 bit. But, I am using Xilinx FFT IP core in Zynq FPGA.

FFT involves scaling, respectively the output can have any data format and width set in the tool.

Hi,
FFT scaling process will reduce the precision(less than N points value). Without scaling, what will be maximum bit representation for fft real and imaginary part.

 

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Every multiply can double the bit width, every addition can add a bit, which is why scaling is used.