FFT delay time in VHDL

[medra]

fft core vhdl greece

hi every body

A small question

I am using the fft core provided by ISE 10.1 , my options for the FFT core makes the delay about 800 clk cycle.

is that core optimized for speed or area??

in other words, if I must use a faster FFT block , could I design a much faster block or will it be difficult????

Any information will be apprecaited

thanx in advance