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# FET oscillator biasing confusion. Multimeter shows voltage drop across Rg.

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#### Terminator3

Hello! I am biasing FET oscillator with three resistors. After choosing optimal load line and Q point I calculated Rd and Rs values. Additionaly put Rg resistor to "isolate" from voltage ground.

I use multimeter to measure Vgs and Vds. When i measure Vgs voltage, it is almost -0.6v (i need -0.3v). Then i discovered that have additional -0.3 voltage drop at gate resistor Rg additional to required -0.3v at Rs. I do not understand, is it because of oscillation, and i can't measure DC of Vgs with multimeter, so real Vgs is -0.3v or some other problem?

I think the transistor is oscillating indeed. You can measure this by putting a pickup probe in proximity to the drain and measuring on the spectrum analyzer. In case the transistor is a MESFET, a junction exists between gate and source which is normally reverse biased, but can start to conduct under large signal drive or oscillating conditions. This can result in a shift of the DC operating point, which in turn could explain what you see.

Terminator3

### Terminator3

Points: 2
Oscillation exists. But i can only have DIY frequency counter at the moment based on prescaler ICs. No spectrum analyzer. I almost sure it is not some harmonic or glitch, because i use simple series feedback with lambda/4 resonator microstrip on the gate of FET.

This can result in a shift of the DC operating point, which in turn could explain what you see.

Does it mean that i must change biasing resistor values to put DC operating to good place?
My transistor is N-CHANNEL HJ-FET. VGs=-0.6v is not optimal for me. Or it is normal operation? and "real" dc operating point is -0.3v. It becomes a more simple question: can i measure biasing of working oscillator (5GHz) with multimeter?

My confusion comes from the fact, that in RF book and some lectures i learned straightforward design steps for biasing fet (DC point, load line, and then biasing). And that there should no be any (almost) gate current, so no voltage drop across Rg.. But i see huge drop =)

The figures of merit of an oscillator are phase noise, supply pushing, and tuning sensitivity. In case you meet these specifications you don't care about DC bias shifts.

If the phase noise is degraded, you can start to investigate why. You can decrease the bias shift, but this will mean that you will reduce the open loop gain which makes the oscillator more sensitive to supply fluctuations and it will reduce the phase noise.

Be aware that a FET is not the best transistor for making a low phase noise VCO. You should look into NEC transistors or BFP-series of Infineon (SiGe BiCmos transistors) for designing oscillators with state-of-the-art phase noise up to 10GHz.

Terminator3

### Terminator3

Points: 2
Instead, use high frequency-high impedance probe

Terminator3

### Terminator3

Points: 2
If the unit is Oscillating there is an AC signal across the Resistor so it will interact with the "R" reading (R = V/I).
Also a Multimeter(MM) uses a small voltage to sense the impedance so the MM will add voltage top that circuit
and could change the natural Frequency of Operation.

As an experiment see if your resistors change value while the circuit is on vs, off.

Terminator3

### Terminator3

Points: 2
You can measure the voltage along the trace, you should see the voltage varied, then it should exist oscillation.

Terminator3

### Terminator3

Points: 2
Generally, a JFET oscillator circuit can easily generate a gate current due to gate forward biasing a higher signal levels. In some cases, gate foward biasing may be the actual voltage regulation mechanism.

Another question is, if you measure the correct gate voltage with a multimeter in oscillator operation. You usually want to have decoupling resistors in 10 k range to block RF currents that would change both operation point and RF level.

Terminator3 and LvW

Points: 2

### Terminator3

Points: 2
Hi terminator,

what about showing us your circuit? I think this could simplify the problem analysis.

Hello again. Here is my circuit picture.

Few days ago my first approach was using Rg=500 Ohm, Rs=30 Ohm. I get some oscillation and some strange things. I do not clearly remember readings from my multimeter. But what i saw voltage drop, and Vg was -1..2v. almost two-three times more than i need. Then i replaced Rg to 30Ohm, voltage drop becomed smaller, some oscillationm but then no oscillation and heating up of Rs (transistor becomed a wire from source to drain?) I thought transistor is gone, BUT. Today i replaced Rg with 500 Ohm, and turned it on. It oscillates, and voltage drop across Rg is very small. I tested it for few seconds.

Also i use pretty "rapid" load line, but as i learned from other oscillator designs: loadline is near maximum ratings, i guess amplified sinusoidal wave never go through whole load line or something like that?

I solved problem by adding gate resistor Rg, and using multimeter with care. Now operating curve is far away from recomended maximum ratings of FET transistor. Maximum current is half of recommended range. Using multimeter on "optimised" design without Rg caused some strange effects, as other mode of operation, heating of scheme elements, sometimes wrong and good readings, sometimes working without a problem. Measuring voltages at gate, source and drain biasing whould be perfect for educational purposes, but currently it is a problem that i do not understand.

Maybe someone can explain why Rg transistor becomed hot? I guess there was a huge current through FET, happy it sitll works =)

p.s. can i use schottky diode for tuning oscillator (put as varactor)?

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