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High fanout means high capacitive load and which means your signal transition is longer. To fix this problem, you can replace the driver with a stronger one or replicate the driver with each driver driving a subset of the load.
Large fan out will result big capacitive load, which slows down the transition time. Of course, the other factor effecting the Tr and Tf is the channel resistance of the driving MOS FETs. By using bigger MOS FETs, the channel resistance is reduced, and thus reduce the RC time constant. The result is improved transition time.
Using bigger driver to drive high fan-out load will increase the load for pre-level. So it is not fact that the bigger for driver strength, the less for delay. So to reduce delay for a path, we need to consider a proper cell with proper size.