Extract Problem in LVS - 1 cells has 1 label short problems

[ee_wmxaa]

assura label short problem

Hi, everyone. I was doing LVS check recently, I found my schematic and layout matched in the "compare" window, but in the "extract" window (also in the LVS result window), I found a short problem. In the summary file, it said "1 cells has 1 label short problems". I do not know how to deal with it. What is "label short"??? I wonder whether anyone can help me with this problem. Many thanks

 

[erikl]

Re: Extract Problem in LVS

What is "label short"???

In schematics, a short-circuit is created by wire labels with the same node name (this is trivial, of course, but it may occur unintentionally).

In layout, a short-circuit can be created by pin labels with the same name. If there's no physical connection between such nets, this is considered as a label short.

If you try to assign 2 different pin labels to the substrate or to an n-well connection, this eventually could also create a label short error message (usually, a multiply stamped error message is uttered in this case).

 

[ee_wmxaa]

Extract Problem in LVS

Hi,erikl

This label short problem is found on the capacitors layout of the circuit. If I removed all the capacitors, this label short problem will also gone. There are no pins connected to the capacitors.

And I have checked there are two pin labels with the same name.

 

[erikl]

Re: Extract Problem in LVS

This label short problem is found on the capacitors layout of the circuit. If I removed all the capacitors, this label short problem will also gone. There are no pins connected to the capacitors.

Hi ee_wmxaa,
thanks for your feedback! So you found it yourself, congratulations!
Depending on the types of capacitors used: Did you possibly flatten the hierarchy? In this case - again depending on the capacitors used - deeper levels of capacitor pins (e.g. their pin names PLUS & MINUS) could appear on the top level and by this cause such error messages.

 

[ee_wmxaa]

Extract Problem in LVS

Hi,erikl
I am sorry for the typo in the previous message, it should be "There are 'no' two pin label with the same name "

The problem wasn't solved yet!!

Actually, I am using tsmc 0.18um process. The cap I used is NMOSCAP. I also run a LVS simply check the capacitor. No problem for it.

 

[tanguaner]

Extract Problem in LVS

when you doing LVS check,do you select compare schematic and layout pin names?You can select it,then try to do LSV again,if the error still exist,maybe there is a real error in your layout,you shoule check it carefully.Otherwise,maybe you have two different net in layout with the same label,or one net with two different label

 

[ee_wmxaa]

Extract Problem in LVS

I have the following error message. But I do not have a cell called nmoscap_PC1. Also, how to locate net "C1"

 

[erikl]

Re: Extract Problem in LVS

I have the following error message. But I do not have a cell called nmoscap_PC1. Also, how to locate net "C1"

These capacitors (in the layout) actually are transistors (nmoscap), their S and D terminals are short-cut (this is your net "C1", it corresponds to the "MINUS" node of the cap; the gate G (the poly) of the nmoscap corresponds to the "PLUS" node).
For proper LVS, instead of the cap symbol, you must instantiate the nmoscap symbol in your schematic, and also connect (create a short-circuit between) S & D !
HTH, erikl

 

[ee_wmxaa]

Extract Problem in LVS



The above diagram shows a nmoscap.

The upper node is the G, the middle one is called B, the lower one is S.

As you can see there is no D, and B and S are already connected to Vss.

 

[erikl]

Extract Problem in LVS

May be there's an extra nmoscap_PC symbol (which might be different)? Sorry, I don't have the tsmc18rf lib.

 

[ee_wmxaa]

Extract Problem in LVS

In the tsmc18rf lib, there are no such nmoscap_PC

 

[erikl]

Re: nmoscap_PC1

In the tsmc18rf lib, there are no such nmoscap_PC

Sorry: nmoscap_PC1
Isn't there a symbol in the tsmc18rf/nmoscap_PC1/ directory structure, where your layout is from?

 

[ee_wmxaa]

Extract Problem in LVS

There is no such NMOSCAP_PC1

 

[erikl]

Re: Extract Problem in LVS

There is no such NMOSCAP_PC1

If your Assura Shorts List tells you there is an S-D short in the tsmc18rf/nmoscap_PC1/layout view, it must have found an instantiation of this layout.
In this case, there also should be a tsmc18rf/nmoscap_PC1/symbol view available. If not, this lib might be incomplete.

Another chance, which you could try: In the schematic, instead of the nmoscap instantiate a standard nmos transistor (with appropriate w & l), connect S, D & B to vss, and G to the same node where G is connected now, then run LVS again. This could work.