Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
There are some (old) technologies, for instance a 1um technology, that are simply scaled down. So a shrink factor is applied to them, but the PDK is not changed. So, you do your design, the models have been adapted, so on silicon it will work the same as you see on screen, you do the layout and when you submit it to fabrication, a certain shrink factor is applied to it all.
Mr forkschgrad wt ur saying is right but wt i am saying is.....is there any difference between factor and %
We are not talking about the percentage dear we are asking about wt is shrink factor and how does it determined...On what basis do we have to give that shrink factor?
its just a factor not % remember and now answer..............
Can anyone answe my question