Explain me this pad from a PAD LEF

[pd_engineer]

Hi ,

i came across the following pad in a pad lef. its class is mentioned as block. wat do we infer from this. only two cells have class as block and the remain have thier class as pad.

MACRO PADIZ40

CLASS BLOCK ;
FOREIGN PADIZ40 17.000 0.000 ;
ORIGIN -17.000 0.000 ;
SIZE 35.000 BY 88.800 ;
SYMMETRY x y r90 ;

thankz

 

[gliss]

Re: PAD LEF Question

From Cadence:

Defines macros in the design.

CLASS
    Specifies the macro type. If you do not specify CLASS, the macro is considered a CORE macro, and a warning prints when the LEF file is read in. You can specify macros of the following types:

          
    	

    COVER
    	

    Macro with data that is fixed to the floorplan and cannot change, such as power routing (ring pins) around the core. The placers understand that CLASS COVER cells have no active devices (such as diffusion or polysilicon), so the MACRO SIZE statement does not affect the placers, and you do not need an artificial OVERLAP layer. However, any pin or obstruction geometry in the COVER cells can affect the pin access checks done by the placers.

    A cover macro can be of the following sub-class:

    BUMP--A physical-only cell that has bump geometries and pins. Typically a bump cell has geometries only on the top-most "bump" metal layer, although it might contain a via and pin to the metal layer below. Bump cells cannot be moved; however, you can change the assignment of a bump cell pin to a driver cell.

           
    	

    RING
    	

    Large macro that can cut prerouted special nets and connect to these nets with ring pins.

         
    	

    BLOCK
    	

    Predefined macro used in hierarchical design.

    A block macro can have the following sub-class:

    BLACKBOX--A block that sometimes only contains a SIZE statement that estimates its total area. A blackbox can optionally contain pins, but in many cases, the pin names are taken from a Verilog description and do not need to match the LEF MACRO pin names.

         
    	

    PAD
    	

    I/O pad. A pad can be one of the following types: INPUT, OUTPUT, INOUT, POWER, or SPACER, for I/O rows; INPUT, OUTPUT, INOUT, or POWER, for I/O corner pads; AREAIO for area I/O driver cells that are placed inside the core of the chip.

    For an example of a macro pad cell, see Example 1-11.