muralikrishnay18
Newbie level 1
Job Description for : Senior Design Engineer(s) for Hyderabad Location
Our client is a US based, NASDAQ Listed IP Fabless Semiconductor Product Development Company, building next generation high speed Memory products and Bandwidth Engines. Innovation here comes from motivating, challenging & some of the best most intelligent minds in semiconductor industries.
To advance their growth in development areas of intelligent data access for network & communication systems, the India Design center at Hyderabad is offering opportunities for Design & verification engineers in the area of High speed FPGA logic design. Our client believes that innovation comes from motivating & challenging some of the best & most intelligent minds in the semiconductor space, combined with the right knowledge, skills and attribute mix.
Job Responsibilities:
Senior Design Engineer(s)
• Create RTL and verification plans at module and chip level for complex SOC’s
• Develop RTL at module levels using platforms and tools based on Verilog, System Verilog, and C.
• Develop efficient system/chip level test and regression environments using scripting languages
• Generate the test cases and run simulations to achieve code and functional coverage goals
• Implement in FPGA environment
Job requirements:
Senior Design Engineer
• 8-10 years of experience in SoC / FPGA Design
• Silicon bring-up expertise
• Hands-on verification experience in an ASIC/FPGA environment with LAN, SAN and chip interconnect background.
• Conversant with system level verification
• Ability to design environments for scalability and reuse with verification and validation goals in mind.
• Ability to analyze and synthesize problems and propose solutions.
• Conversant with the following:
Verilog, System Verilog tools
Networking, and Interconnect Protocols experience, including PCI Express, 40/100G Ethernet, Fiber Channel, HT, sRIO, Interlaken, SAS is a plus.
• FPGA board bring-up and emulation skills
• Prior ASIC/FPGA customer experience is a plus
• Network protocols knowledge
Education: B.E. / B.Tech / M.E. / M.Tech. / M.S. in Electronics / Computer Sciences / Micro-Electronics / Semiconductors / Embedded Systems from Premier Institutes such as IIT/BITS/NITs/CEERI, Pilani/IISc / other leading Engineering Institutions.
Compensation: Best in the industry and commensurate with experience and expertise.
If you have the drive, skills & right attitude and would like to be a part of a team that rewards innovation & accomplishments, we would like to hear from you.
Please email your detailed profile in word format at semiconjobs@hcs.ind.in.
The requirements are urgent & our client would like to formalize the on-boarding process by Nov’12 end.
Our client is a US based, NASDAQ Listed IP Fabless Semiconductor Product Development Company, building next generation high speed Memory products and Bandwidth Engines. Innovation here comes from motivating, challenging & some of the best most intelligent minds in semiconductor industries.
To advance their growth in development areas of intelligent data access for network & communication systems, the India Design center at Hyderabad is offering opportunities for Design & verification engineers in the area of High speed FPGA logic design. Our client believes that innovation comes from motivating & challenging some of the best & most intelligent minds in the semiconductor space, combined with the right knowledge, skills and attribute mix.
Job Responsibilities:
Senior Design Engineer(s)
• Create RTL and verification plans at module and chip level for complex SOC’s
• Develop RTL at module levels using platforms and tools based on Verilog, System Verilog, and C.
• Develop efficient system/chip level test and regression environments using scripting languages
• Generate the test cases and run simulations to achieve code and functional coverage goals
• Implement in FPGA environment
Job requirements:
Senior Design Engineer
• 8-10 years of experience in SoC / FPGA Design
• Silicon bring-up expertise
• Hands-on verification experience in an ASIC/FPGA environment with LAN, SAN and chip interconnect background.
• Conversant with system level verification
• Ability to design environments for scalability and reuse with verification and validation goals in mind.
• Ability to analyze and synthesize problems and propose solutions.
• Conversant with the following:
Verilog, System Verilog tools
Networking, and Interconnect Protocols experience, including PCI Express, 40/100G Ethernet, Fiber Channel, HT, sRIO, Interlaken, SAS is a plus.
• FPGA board bring-up and emulation skills
• Prior ASIC/FPGA customer experience is a plus
• Network protocols knowledge
Education: B.E. / B.Tech / M.E. / M.Tech. / M.S. in Electronics / Computer Sciences / Micro-Electronics / Semiconductors / Embedded Systems from Premier Institutes such as IIT/BITS/NITs/CEERI, Pilani/IISc / other leading Engineering Institutions.
Compensation: Best in the industry and commensurate with experience and expertise.
If you have the drive, skills & right attitude and would like to be a part of a team that rewards innovation & accomplishments, we would like to hear from you.
Please email your detailed profile in word format at semiconjobs@hcs.ind.in.
The requirements are urgent & our client would like to formalize the on-boarding process by Nov’12 end.