Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

[spectrallypure]

Hi all!

I am looking for the companion Excel spreadsheets for Prof. Binkley's book "Tradeoffs and Optimization in Analog CMOS Design", which unfortunately are not available anymore at his website or at the publisher. I just could find 2 of the several sheets on a past post here (https://www.edaboard.com/threads/266013/), so I wonder if anybody out there could please share any other sheets that you might have been able to download while the links still worked.

Thanks in advance for any help!

Regards,

Jorge.

 

[erikl]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

Hallo Schorsch ;-)

actually only these 2 sheets were available from the initial link. There are more sheets shown & described in the book itself.

Regards, erikl

 

[spectrallypure]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

Servus, Erikl!

Well, it's a pity that we only have those two... In the (now dead) companion website (https://coefs.uncc.edu/dmbinkle/book/downloads/) a total of 8 spreadsheets are listed (the first 2 are the ones we have):

(MOSDesign,IC0.1-30,L1um,ID100uA,nMOS,0.18um.xls)
(MOSDesign,IC1,L1um,ID1-100uA,nMOS,0.18um.xls)
MOSDesign,IC10,L4-0.18um,ID100uA,nMOS,0.18um.xls
MOSDesign,DC,Balanced,AC,ID100uA,nMOS,0.18um.xls
MOSDesign,DC,Balanced,AC,ID1uA,nMOS,0.18um.xls
MOSDesign,Three,Simple,0.5um,CMOSOTAs.xls
MOSDesign,Three,Cascoded,0.18um,CMOSOTAs.xls
MOSDesign,Two,Micropower,LowNoise,0.35um,CMOSPreamps.xls

It would be awesome if somebody that maybe was able to get them in the past could post the missing ones. :-o

Cheers,

Jorge.

 

[erikl]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

It would be awesome if somebody that maybe was able to get them in the past could post the missing ones. :-o

You could perhaps try and ask David Binkley <dmbinkle@uncc.edu> personally. He used to be very responsive (at least in 2010).

 

[spectrallypure]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

Good idea erikl! I think it's worth to give it a try, who knows, maybe he answers! (from his website CV he seems to be in leave-of-absence, though)

BTW, does anybody know if the 0.18u process he uses in his book is from TSMC, UMC or IBM? (it's obviously a real process--he used it for chips that were actually fabricated!)

I am about to embark the painful task of extracting the EKV 2.6 parameters for the process I will use, and it would be *extremely* useful if I could first validate my extraction procedure with the process he uses in the book. I mean, if the book parameters correspond to any of these foundries (which I can simulate using their official design kit models and spectre), then I could first apply the extraction flow to it until getting more or less the same parameter values as in the book, and then just re-apply the extraction flow to my target process (0.13u)... Any clues on that?

 

[erikl]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

Hello Jorge,

BTW, does anybody know if the 0.18u process he uses in his book is from TSMC, UMC or IBM? (it's obviously a real process--he used it for chips that were actually fabricated!)

I didn't find any hint about the 0.18µ fab in his book. I just wondered about the unusual µn/µp ratio of this process, s. Table 3.2 from his book (below; blue entries are from my side). Also, you might want to check hanspi's comment in this thread.

I am about to embark the painful task of extracting the EKV 2.6 parameters for the process I will use, and it would be *extremely* useful if I could first validate my extraction procedure with the process he uses in the book. I mean, if the book parameters correspond to any of these foundries (which I can simulate using their official design kit models and spectre), then I could first apply the extraction flow to it until getting more or less the same parameter values as in the book, and then just re-apply the extraction flow to my target process (0.13u)... Any clues on that?

In Binkley's book, the shown tables (no .xls files, unfortunately) contain a lot of parameters for the 0.18µm process, also the EKV relevant ones, AFAIR. If you don't want to buy the book, I could privately send you copies of these tables, if you like. I think I wouldn't be allowed to publish these on the forum.

 

[spectrallypure]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

Hi erikl, thanks for your comments and for the process parameters table! I am currently reading Binkley's book, but I had not given much attention to that particular table. Well, as you and hanspi point out, that's some weird mobility ratio for the process he reports (I am working in a 130nm process and even there the mobility ratio is only about 3.5). Well, I guess the identity of his process would have to be added to the "stuff to ask Prof. Binkley himself" list... :-|

Cheers,

Jorge.

 

[zaimang101]

Re: Excel sheets for book "Tradeoffs and Optimization in Analog CMOS Design"

https://coefs.uncc.edu/dmbinkle/download-spreadsheets-form/ works